Come and join our team within the central IP team at Intel as an Analog/Mixed-signal Design Engineer and work on some of the most advanced High Speed IO IPs in the world, with some of the most advanced Intel processes. We are seeking for an expert Analog Designer to join our excellent design team. In this role you will have a chance to define, design, implement and verify analog and mixed signal circuits, like LDOs, ADCs/DACs, OPAMPs, comparators, CML designs for CTLE, drivers for clocking in Tx, etc. You will be developing designs to support high-speed, low-power wireline transceiver Phys for some of Intel's highest-volume product lines.Responsibilities will include but not limited to:Involve in circuits for high-speed I/O design Take full responsibility of a design from bottom to topWork closely with mask design engineers to optimize design performance at circuit and full-chip levelPropose and implement creative design approachesDocument and review the achieved resultsWork closely and collaborate within a team with expert analog designers and experienced layout designersMotivation for continuous skill-development in high-speed/Analog/Mixed signal designBeing a team player, able to work in a group, having a desire to mentor other designers

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must have a Bachelor's degree in Electrical/Computer Engineering, Computer Science or a related field and 4+ years of experience -OR- a Master's degree in Electrical/Computer Engineering, Computer Science or a related field and 3+ years of experience -OR- a PhD degree in Electrical/Computer Engineering, Computer Science or a related field and 1+ years of experience in the following:
Designing, testing and validating analog and/or mixed signal circuits with sub-micron CMOS technology
VLSI and industry standard CAD tools for schematic capture, simulation, layout and physical verification, such as Cadence Spectre/Maestro/Finesim/AMS Designer /Virtuoso
High-speed Analog IO designs, PHY architectures, and trade-offs
Deep sub-micron device physics, process technology and manufacturing
Analog layout techniques, including floor-planning, matching, shielding and parasitic optimization

Preferred Qualifications:
Familiarity with Verilog RTL coding

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.