17 days old

Analog Design Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0216728
Job Description

The world is transforming and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower peoples digital lives.

Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful. We are looking for an Analog Design Engineer to contribute towards NextGen Data center Memory IO Design for Intel's High-Performance Data center Microprocessors.

Responsibilities will include but not limited to:

  • Technology path finding, specification, and design of complex analog and mixed signal circuits, custom analog layout supervision, documentation, DFT/DFM and post silicon validation.

  • Analog circuit design responsibilities consist of high speed IO (HSIO) transmitters (Tx) and receivers (Rx), amplifiers (Op-Amps), equalizers (CTLE, DFE), filters, high performance low-jitter clocking, on-die voltage regulators (LDO) and references (BGR), signal integrity analysis, system level modeling, power delivery, supply noise sensitivity reduction (Bias generation and distribution), feedback loop analysis, stability, compensation, poles-zeros and other elements necessary to design, verify and productize high performance analog IO solutions.

Additional responsibilities include:

  • Collaborating with other design disciplines, and contributing to design reviews.

  • Be creative, accountable, and quick to make good decisions.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

This position is not eligible for Intel immigration sponsorship.



Minimum Qualifications:
The candidate must have a Bachelor's degree in Electrical Engineering or Computer Engineering with 3+ years of experience.

OR

Master's degree in Electrical Engineering or Computer Engineering with 1+ years of experience.

OR

PhD degree in Electrical Engineering or Computer Engineering in lieu of work experience with:

  • Understanding of VLSI Analog circuit design tradeoffs, small signal analysis, digital design and building blocks (flops, latches, sizing, boolean algebra).

  • Familiarity with design tools and flows such as Synopsys, Cadence.


Preferred Qualifications:

  • Knowledge of highspeed IO signaling, transmission line theory, power delivery power and signal integrity and power integrity concepts, PLL, Noise analysis, Jitter, clocking, ADC, DAC, Switched-Cap circuits.

  • Memory IO training, Firmware, IO link training algorithms, Micro-architecture specification documentation.

  • Reliability: RV, ESD, Aging, Electrical overstress.

  • Cross discipline knowledge in any of these areas: Analog integration, RTL, System Verilog, Static timing analysis, APR, Floor planning, Metal routing, PowerGrid.

  • Software: Matlab, Scripting.

  • Post-Si knowledge: Si characterization, Lab equipment (Oscilloscopes, BERT, VNA, signal generators).

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Massachusetts, Hudson;US, Texas, Austin;Virtual US and Canada


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$113,500.00-$170,120.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.


Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

Posted: 2022-05-07 Expires: 2022-06-07

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Analog Design Engineer

Intel
Santa Clara, CA 95050

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