27 days old

Analog Engineer - Power delivery

Intel
Santa Clara, CA 95050
  • Job Code
    JR0177976
Job Description

We are looking for a highly motivated Analog Design Engineer to join the Circuits Power Delivery Team for Intel's next generation of chipsets/SOC. As part of the team, you will be working across different teams within the organization: Architecture, Technology Development, IP Designers, Package and Platform Engineers, to optimize power delivery in the SOC.

Responsibilities of this role include, but are not limited to:

  • Design, simulation and characterization of on die power delivery related circuits such as: LDOs, power gates, voltage monitors
  • MIM/decoupling allocation and guidance for power delivery circuits
  • Design, simulation and characterization of circuits and components for LDOs, PLLs, DLLs, thermals


Behavioral Traits:

  • Good communication, interpersonal and problem-solving skills
  • Highly motivated, skilled at working effectively both independently and as a team
  • Collaborative skills to work across the organization to achieve goals and thrive in a team-oriented environment


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum Qualifications:

The candidate must have a Master's degree in Electrical/Computer Engineering.

2+ years of experience in Analog design with proven experience in:

  • Design of on-die power delivery circuits: voltage regulators, power gates, band gap reference, voltage and current monitors


Preferred Qualifications:

  • PhD degree in Electrical/Computer Engineer
  • Mixed signal design
  • Design of analog circuits: LDOs, BandGap, powergate, PLLs, HSIOs, thermal sensors
  • Post-silicon debug experience

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, California, Folsom



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2021-09-28 Expires: 2021-10-29

Before you go...

Our free job seeker tools include alerts for new jobs, saving your favorites, optimized job matching, and more! Just enter your email below.

Share this job:

Analog Engineer - Power delivery

Intel
Santa Clara, CA 95050

Join us to start saving your Favorite Jobs!

Sign In Create Account
Powered ByCareerCast