25 days old

ASIC EDA Tool Software QA Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0227800
Job Description

The Design Enablement ASIC Quality Assurance (QA) team is looking for qualified candidates to enhance our ASIC QA coverage for Process Design Kits (PDKs). These design kits provide collateral and flow customizations to enable Electronic Design Automation (EDA) ASIC tools and flows for the implementation and verification of silicon design products.
The selected candidate will be responsible for executing and enhancing the QA methodology and testcases which validate the ASIC collateral across multiple processes, EDA tools, and flows to ensure high-quality delivery of ASIC kit content to customers.
Responsibilities will include:

  • Executing and enhancing QA methods for ASIC Design Kit collateral and design flows.
  • Testcase development and support of ASIC QA test scripts.
  • Analyzing and reporting Design Kit ASIC QA results.
  • Working closely with ASIC collateral developers to root-cause and resolve issues.


Qualifications

You must possess the below Minimum Qualifications requirements to be initially considered for this position. Preferred Qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications
BS degree in Electrical Engineering (BSEE) with semiconductor industry ASIC design flows internship OR MS in Electrical Engineering (MSEE) with ASIC design flows education. Experience with or knowledge of:

  • ASIC design flows from RTL to Silicon including Synthesis, APR, GDS, DRC, Parasitic Extraction (PEX) and Static Timing Analysis (STA).
  • Automated Place and Route (APR) tools including Synopsys Fusion Compiler and Cadence Innovus.


Preferred Qualifications

  • Linux environment capabilities and Python scripting skills.
  • ASIC Test case generation skills
  • Root cause analysis skills.
  • Static Timing Analysis tools including Synopsys Primetime and Cadence Tempus.
  • Extraction tools including Synopsys StarRC and Cadence Quantus.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Other Locations

US, California, Folsom;US, California, Santa Clara;US, Oregon, Hillsboro


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-07-14 Expires: 2022-08-14

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ASIC EDA Tool Software QA Engineer

Intel
Phoenix, AZ 85003

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