14 days old

CAD Engineer/EDA Developer

San Jose, CA 95113
  • Job Code
Job Description

Intel is a global leader, creating world-changing technology that enables progress and enriches lives. We are at the intersection of several technology inflections artificial intelligence, 5G network transformation and the rise of the intelligent edge- that together will shape the future of technology. The Custom Structured ASIC Engineering Group (eASIC) Team within Intel's Programmable Solutions Group (PSG) is looking for a Software Engineer.

Intel Programmable Solutions Groups (PSG) is leading innovations in FPGA, structured ASIC, and heterogeneous packaging capabilities which is changing what is possible in mission critical applications. PSG is looking for a talented, highly motivated candidate to join its Military, Aerospace and Government (MAG) group. As a senior level MAG Strategic Solutions Architect, you will define Intel PSG strategy in the Government Analytics segment, working closely with Product Planning, Product Marketing and Sales to establish and execute on the strategy to grow Intel FPGA adoption in Government HPC, Cloud, Security and Machine Learning applications.


In this position, responsibilities for this role include, but are not limited to
the following:

  • Develops and applies Computer Aided Design (CAD) software engineering methods, theories and research techniques in the investigation and solution of technical problems arising in Structured ASIC design.

  • Assess architecture and hardware limitations, plans technical projects in the design and development of CAD software.

  • Define and select new approaches and implementation of CAD software engineering applications and design specifications and parameters.

  • Develop routine and utility programs.

  • Prepare, design specifications, analysis and recommend presentation for approval.

  • Specify materials, equipment and supplies required for completion of projects.

  • Evaluate vendor capabilities to provide required products or services.


Education Requirement:

  • Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field and 6+ years of industry work experience, or

  • Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field and 4+ years of industry work experience, or

  • PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field and 2+ years of related work experience.

Minimum Required Qualifications:  

  • Experience with hardware formats Verilog, LEF, DEF, Liberty.

  • Experience with placement and routing tools development for at least one of platforms (ASIC, FPGA, SASIC).

  • Experience with high level language programming C, C++.

  • Experience with script languages Python, Perl, Ruby, etc.

Additional Preferred Qualifications:

  • Experience with placement and routing tools development for FPGA or SASIC.

  • Experience with 10 nm or finer technology.

  • Experience with static timing analysis and timing optimization.

  • Experience with Open Access data base.

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

Other Locations

US, California, Folsom;US, California, San Francisco;US, California, Santa Clara;Virtual US and Canada

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here

Posted: 2022-05-09 Expires: 2022-06-09

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CAD Engineer/EDA Developer

San Jose, CA 95113

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