11 days old

College Undergraduate E-Core RTL Design Engineer

Intel
Austin, TX 78701
  • Job Code
    JR0212641
Job Description

This position is for an RTL designer working on the Device Development Group (DDG) E-Core team.  The E-Core team is chartered with designing Intel's leading power efficient processors using the most advanced and innovative process technologies. The processors conceived, designed and developed by the team directly contributes to Intel's leading processors used to create integrated hardware and software solutions such as processors, chipsets, graphics processors, motherboards, and networking components that deliver capabilities for security, manageability, performance, and energy efficiency.

As an RTL Design Engineer your responsibilities include:

  • Developing, designing, and delivering RTL for a high performance-power/area efficient CPU IP.

  • Analyzing multiple uarch and implementation options to find the optimal design point considering power/performance/area/cost tradeoffs.

  • Developing a functional block/unit RTL model, then integrating and validating, planning and directing physical implementation and block integration

As an ideal candidate you exhibit behavioral traits that indicate your:

  • Skills at using sound methods and data to test new ideas as well as the desire to have your own ideas be challenged by others

  • Skills to develop an implementation plan, monitor key indicators, and adjust resources and scope to deliver value on schedule

  • Strong verbal and written communication and collaboration skills.



Qualifications

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:

You must have a Bachelors in Computer Engineering or Electrical Engineering Computer architecture.

 

Experience in:

  • RTL Verilog, V2K, or System Verilog with a working knowledge of hardware modeling issues and logic debug environments

  • Modern energy-efficient/low-power logic design techniques, including those specifically applicable to high frequency optimization

  • Scripting in an interpreted language (e.g. TCL, Perl, Python, Ruby)

Preferred Qualifications:

  • Knowledge of Intel Architecture ISA and system architecture, including x86 assembly language

  • Experience with high speed circuit design and optimization for datapath, circuits and/or arrays

  • Familiarity with circuit planning and timing convergence

 

This position is not eligible for Intel immigration sponsorship.

Inside this Business Group

The Devices Development Group (DDG) is a global organization focused on the development and integration of SOCs, critical IPs including Atom and chipsets that power Intel's leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.



Other Locations
US, Arizona, Phoenix; US, Oregon, Hillsboro;


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-10 Expires: 2022-06-10

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College Undergraduate E-Core RTL Design Engineer

Intel
Austin, TX 78701

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