2 days old

CPU RTL Design Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0213081
Job Description

The world is transforming - and so is Intel!  Here at Intel, we believe the world needs technology that can enrich the lives of every person on Earth.

The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon.  We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.

If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we invite you to join us, to do something wonderful!

As a key member within AADG, you will have the opportunity to contribute in the development of new advanced CPUs and help to create the next leap in Microprocessor Design and the future of the x86 environment at Intel.

Role Responsibilities include, although not limited to:

  • Development of architecture and microarchitecture specifications.

  • RTL implementation, Delivery of high quality logic design that meets functional and PPA goals.

  • Process technology exploration to achieve the highest performance per watts on leading edge process technology.

  • Work closely with verification team in determining the proper validation strategy for new design and defining and providing feedback on test plans.

  • Drive design convergence and perform all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a manufacturing-ready design database.

  • Collaborate with cross functional team members.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum Qualifications:

The candidate must have a Master's degree in Electrical/Computer Engineering Computer Science or related Computing discipline -OR- a PhD in Electrical/Computer Engineering Computer Science or related Computing discipline and experience in:

  • CPU architecture including the concept of Instruction Fetch, Decode, Out of Order execution, Register Renaming, Branch prediction, Memory Coherency

  • RTL coding Verilog or System Verilog

  • General scripting and programming skills Python, Perl, CC, etc.


Preferred Qualifications:

  • High performance CPU design techniques

  • Power reduction techniques

  • SoC Physical design flow from high level design to synthesis, place and route, timing and power optimization

  • Trade off and optimization technique between Performance Power and Area

  • Functional verification/formal verification

Inside this Business Group

The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon.  If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, please join us.  We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.  Join us to do something wonderful!



Other Locations

US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-25 Expires: 2022-06-25

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CPU RTL Design Engineer

Intel
Hillsboro, OR 97123

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