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Job CodeJR0197009
We're looking for
motivated and talented engineers to join the E-Core CPU
verification team.
You will join the team
responsible for exhaustively verifying the architecture and
micro-architecture changes implemented in the CPU using a
combination of dynamic and formal verification
methods.
Your responsibilities may include, but
are not limited to, the
following:
- Technical ownership of validation of a microarchitecture block, methodology, or otherwise significant aspect of CPU
- Understand and contribute to micro-architecture specification and define verification strategy for a significant portion of the design
- Perform ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU
- Document test plans and drive technical reviews of plans and proofs with design and architecture teams
- Develop validation content like test benches, test generators, formal proofs and automation tools to accelerate execution
- Influence and contribute to post-silicon validation Post-silicon failure debug and sighting resolution
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
Minimum Qualifications:
The
candidate must possess a Bachelor's degree
in Computer Engineering or Electrical
Engineering with 3+ years of experience or
a Master's degree in Computer Engineering or
Electrical Engineer.
Experience and/or
Education in the following
areas:
- In-depth computer architecture knowledge with emphasis on out of order processor execution
- Hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools
- Industry standard formal verification tools such as JasperGold, IFV, Questa Formal, VC Formal
- Test bench development concepts and languages like Specman, System Verilog UVM/OVM
- Test writing/generation, checker development, coverage analysis, failure debug, root cause analysis
- Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.
- Intel or industry experience in pre-silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs
Preferred Qualifications:
- Knowledge of Intel Architecture ISA and system architecture, x86 assembly language
- Assembly language programming, code generation, or other low-level software experience
- Post-silicon debug and analysis
- Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations. DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Other
Locations
US, Texas,
Austin
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or ordinance.
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