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Job CodeJR0226203
Assembly and Test Technology Development (ATTD) is looking for a Defect Reduction Engineer to join the Yield team. Candidate must be able to:
-Develop
solutions to problems utilizing formal education statistical
knowledge and problem solving
tools.
-Demonstrated ability to
influence stakeholders and formulate databased recommendations
directed at defect reduction and yield
improvement.
-Should have high
tolerance to ambiguity and be effective in a fast pace working
environment.
- Demonstrated
analysis of large and diverse data sets apply statistical methods
and draw meaningful conclusions to help direct the efforts of the
organization.
The
Defect Reduction Engineer responsibilities are but not limited
to:
-Closely
monitor the Visual Mechanical Defect Yield Baseline.
-Manage yield excursion
and drive permanent fixes with responsible
teams.
-Defining the defect
reduction roadmap and driving the yield improvements with partner
teams that include not limited to Integration, Materials
Manufacturing.
-Assembly
and/or Test Modules, WATD, AFO, LTD/DMO, and QnR
partners.
-Will focus on internal
development and manufacturing activities as well as engage with
DMO/ATM counterparts to help define and drive their yield roadmap
during transfer.
The
ideal candidate should exhibit the following behavioral traits or
and
skills:
-Problem
solving by applying formal problem solving methodologies and
troubleshooting
skills.
-Analytical problem
solving and effective communication
skills.
-Teamwork and
partnership.
-Tolerance of
ambiguity.
-Self-motivation.
Some
domestic and International travel is required ( 5%-10% per
year).
Qualifications
You must possess the below minimum qualifications to be initially considered for this position.
Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Candidate must possess a Master's Degree with 3+ years of experience or PhD Degree with 1+ years of experience in Materials Science and Engineering or Mechanical Engineering or Chemical Engineering or Electrical Engineering or Chemistry or Physics or similar field.
Preferred Qualifications:
1+ years of experience in the following:
- Low Yield Analysis techniques, material characterization, micro contamination and foreign material reduction activities.
- Data analysis software such as JMP and data mining tools such as SQL and PF.
- Packaging Assembly and test process or other semiconductor processes
- Data visualization including scripting and automation of standardized analyses and reports.
- LYA material characterization, micro contamination and FM (foreign material) reduction activities.
- Experience in/partnering with DEFMET layer owner/tool owner and familiar with Klarity/ICE.
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.
Other
Locations
US, Arizona,
Phoenix
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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