29 days old

Design Automation Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0217921
Job Description

We are the Product Enablement Solutions Group (PESG).  Come join our world class CAD team and take part in developing the future IPs, Cores, and SOCs that will change the world!

We are looking for motivated engineers to deliver cutting-edge tools, flows, and methodologies for improving design productivity and drive Design-Technology co-optimization.

PESG is a worldwide organization that delivers an end-to-end design system for development of Intels IPs, Cores, and SOCs.

We partner with the hardware design teams and EDA vendors.

We leverage a mix of experts with different backgrounds, cultures, perspectives, and experiences to deliver a world-class design system that powers Intel's leadership products.

Your responsibilities may include, but are not limited to:

  • Delivering world-class Tools, Flows and Methodologies (TFM) for Formal Equivalence Verification and RTLECO flows to Intels IP and SoC product design teams

  • Deploying the Flow to solve Equivalence verification Problems through all stages of ASIC design

  • Working directly with the tool vendor companies to ascertain tool's quality and usability

  • Enhancing design team productivity by increasing throughput, reducing iterations, and enabling larger and larger blocks

  • Enabling leading edge process technologies on Intel and external foundries. Working on cutting edge technologies such as Machine Learning and Cloud

Important behavior attributes:

  • Ability to create and drive concepts to innovative solutions

  • Strong verbal and written communication skills

  • Analytical and problem solving skills

  • Effective team player with continuous learning mindset

What we offer: 
We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth. 
As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results. 
We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation). 
We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and much more creative perks that make Intel a Great Place to Work! 
We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.

 


Qualifications

Minimum Qualifications Statement
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and internship experience.

Minimum Qualifications:

Candidate must have a Masters degree in Electrical/Computer Engineering, Computer Science, or related major and some working experience in the following:

  • BE design/PD, RTL2GDS, Formal Equivalence verification

  • Verilog/System Verilog

  • Scripting Languages

Preferred Qualifications:                             

Direct hands-on experience in one or more of the following areas:

  • EDA/CAD vendor tools (Conformal, Formality)

  • Programming in scripting languages (Perl and TCL)

Inside this Business Group

Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.



Other Locations

US, California, Folsom;US, Oregon, Hillsboro;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-26 Expires: 2022-05-27

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Design Automation Engineer

Intel
Santa Clara, CA 95050

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