10 days old

Design Enablement Quality and Reliability Engineer

Hillsboro, OR 97123
  • Job Code
Job Description

To support Intel IDM 2.0 and world leading Intel Foundry Services (IFS) strategy, Technology and Design Enablement Quality and Reliability group is looking for talents in different reliability areas to join this exciting journey to drive design enablement in quality and reliability areas with Ease of Use (EoU) features on Intel technology to build competitive design rules, models, PDK and EDA tools.

You will join a highly motivated team of top-notch engineers solving challenging technical problems in general design enablement and Design for Reliability (DFR) areas include but are not limited to DTCO (Technology-Design Co-Optimization), PDK (Process Design Kits), Hard and soft IP (Intellectual Property) ecosystem enablement, TFM (Tool/Flow/Methodology), PPA (Power Performance Area) and reliability co-optimization on leading edge advanced technologies. You will be at the forefront of co-optimizing Intel's state-of-the-art process technology with diverse design for reliability needs in order to enable best-in-class design and products.

Job Description:
The Technology Development Quality and Reliability Engineer will be responsible for but not limited to:

  • Evaluate reliability design rules, processes, and techniques used in modelling PDK technology collaterals.

  • Deliver standardization in reliability design rules, PDK and EDA tools for internal and external customers.

  • Hands-on work with advanced technology features in simulation, extraction and reliability EDA tools.

  • Work with components, IP and SOC design team to drive DFR features and ensure design quality and reliability for commercial and automotive products.

  • Make recommendations for changes in design or formulation to improve the system and/or process reliability.


This is an entry-level position. You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research and relevant previous job and/or internship experience.

Minimum Qualifications:

  • MS in Electrical Engineering, Electronics, Physics or equivalent.

Preferred Qualifications:

  • PhD in Electrical Engineering, Electronics, Physics or similar.

  • CMOS device physics, circuit simulation and interconnect modelling for industry standard CAD tools.

  • Perl or python experience (course work or project/internship)

  • Transistors, solid-state physics, optoelectronics, MEMS, novel devices, interconnects, dielectrics, semiconductor packaging, power delivery, signal integrity, soft errors (interaction of radiation and semiconductors), memory reliability, advanced memory technologies, electrostatic discharge, latchup, early life failure, and device, system, and product reliability.

  • Experience (coursework or projects/internships) with scripting languages such as TCL, Perl, or Python.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-17 Expires: 2022-06-17

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Design Enablement Quality and Reliability Engineer

Hillsboro, OR 97123

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