26 days old

Design Technology EDA Enablement Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0221055
Job Description

As an Design Technology EDA Enablement Engineer, you'll be responsible for but not limited to the following:

  • Define technical specification for Intel advance technology features to enable Intel-specific and industry standard EDA design tools
  • Coordinate development of these technology features, develop QA plans and drive test-cases development working with relevant stakeholders
  • Engage with internal partners and external EDA vendors to coordinate tool feature requirements and specification
  • Joint effort with partners in DE organization to evaluate and isolate performance contributors for technology features as part of enablement
  • Build and qualify Process Pathfinding Kits and tools with quick turnaround time
  • Drive innovation and initiatives to enhance existing automation, tools, and methodology.
  • Identify and analyze problems, plans, tasks, and solutions
  • Cultivate and reinforce appropriate group values, norms, and behaviors
  • Perform in a dynamic, challenging and sometimes ambiguous environment with drive and creativity


Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum Qualifications
MS or PhD in Electrical Engineering or Computer Engineering or related STEM major, with 6+ months experience in the following:

  • Parasitic extraction
  • EDA tools, flows and methodology
  • Semiconductor device physics, process technology and design rules
  • One of the following: Python, PERL, TCL


Preferred:

  • Device Modeling
  • Understanding of Product performance/Power/Area (PPA)
  • Reliability verification, ESD concepts, standard cell library and memory architectures

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Other Locations

US, Arizona, Phoenix;US, California, Santa Clara;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-28 Expires: 2022-05-29

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Design Technology EDA Enablement Engineer

Intel
Hillsboro, OR 97123

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