6 days old

Device Engineer (SK)

Santa Clara, CA 95050
  • Job Code
Job Description

It's an exciting time to join Intel as a Device Engineer!

What you'll be doing:

  • Contribute by defining process and device architectures, technology collaterals as well as developing scaling paths for leading-edge memory technologies.
  • Design, characterization, and optimization of CMOS transistor and interconnect technologies to extend Intel's lead in NAND memory performance, cost, and quality.
  • Define robust test structures to characterize advanced memory CMOS transistors.
  • Perform DC/AC testing to validate design rules and extract key device parameters.
  • Develop test programs for reliable parametric testing in high-volume manufacturing.
  • Analyze parametric data to optimize CMOS performance and improve product yield.

An ideal candidate will demonstrate the following:

  • Technical problem-solving capabilities, leadership, and communication skills.
  • Visualize technology challenges and process change impact on part performance.
  • Willing to work effectively with a cross-disciplinary team of internal and external partners

The position is associated with the sale of the NAND business to SK Hynix aligning to Phase 2 of the transaction. Employees aligned to Phase 2 will continue to be employed by Intel developing NAND technology and components. Phase 2 of the transaction is expected to close in March 2025 at which time employees aligned to this phase of the transaction will transition employment to Solidigm, a stand-alone US subsidiary of SK Hynix headquartered in San Jose, California with offices world-wide. Solidigm is a leading global supplier of NAND flash memory solutions, led by Robert (Rob) B. Crooke as CEO, previously senior vice president and general manager of Intels Non-Volatile Memory Solutions Group. To read more, see: https://www.intc.com/news-events/press-releases/detail/1513/intel-sells-ssd-business-and-dalian-facility-to-sk-hynix


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered plus factors in identifying top candidates.

Requirements listed would be obtained through a combination of industry-relevant job experience, internship experiences, and or schoolwork/classes/research.

Minimum Qualifications:
- Master's degree in Electrical Engineering or a related degree

- 3+ years of experience in the following:

  • Device physics, CMOS process flow, and device characterization techniques.
  • Test structure design and DC/AC device bench measurements.
  • Programming languages, such as C, C++, VBScript, and/or Python.
  • Digital and analog circuit functions and design implementation.

Preferred Qualifications:
- Ph.D. in Electrical Engineering or a related degree.

- 1 year of experience in the minimum qualifications and 4 years of combined experience in the following:

  • Developed scripts and algorithms for parametric test automation.
  • Data analysis tools, such as JMP and Excel, and statistical analysis techniques.
  • Cadence design environment, including schematics, layout, DRC, LVS, etc.
  • Semiconductor device physics, process integration, fabrication, and characterization techniques.

Inside this Business Group

Employees in Intel's NAND Product Group deliver solutions that are transforming computing across all segments from data centers to Ultrabooks. They invent, develop, bring to market and support customers with leading-edge NAND flash memory and system level solutions such as solid state drives (SSDs). SSDs are accelerating performance for gaming enthusiasts, reducing total cost of ownership for IT managers of data centers and improving security and reliability for businesses. This dynamic group is strategically positioned to become the leading Non-Volatile Memory solution supplier for the compute segment and is a key to expanding markets and continuing the growth for Intel.

Other Locations

US, California, Folsom

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-17 Expires: 2022-06-18

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Device Engineer (SK)

Santa Clara, CA 95050

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