21 days old

DFT Engineer

Intel
Hudson, MA 01749
  • Job Code
    JR0219197
Job Description

Join Intel's centralized Design for Test Engineering Group as a DFT Engineer! In this role responsibilities include, although not limited to:

  • Develop and support design for test (DFT) structures.

  • Determine design for test approaches and develop DFT architecture.

  • Design and verify DFT structures for memories (MBIST), digital and analog circuitry.

  • Perform scan synthesis.

  • Create, simulate and verify automatic generated test patterns (ATPG).

  • Create functional tests and corresponding test patterns.

  • Knowledgeable regarding failure mechanisms in silicon production and creating test algorithms.

  • Support silicon bring up of test patterns.

  • Perform diagnosis of test patterns on silicon and optimize test time.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum Qualifications


The candidate must have a Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science and 1+ years experience -OR- a Masters Degree in Electrical Engineering, Computer Engineering, Computer Science with experience in the following:

  • RTL coding such as Verilog or SV

  • DFT (SCAN, ATPG, Memory test, or IO test)

  • DFT EDA tools, architecture or IP development, or silicon bring up

Preferred Qualifications

  • RTL environments and/or silicon design

  • Fault grading

  • DFT concepts

  • Experience supporting multiple design teams and understanding SOC design flows

  • SW skills using Perl, TCL, C++, etc.

Inside this Business Group

Product Enablement Solutions Group (PESG) is one of the key pillars, enabling Intel product design teams get to market faster with winning leadership products.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-27 Expires: 2022-05-28

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DFT Engineer

Intel
Hudson, MA 01749

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