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Job CodeJR0228011
The Engineering Manager position within the Design Enablement (DE) organization of Technology Development (TD) is chartered to develop high quality and best in class runsets (DRC, LVS decks) for multiple EDA vendor tools to support internal and external product design teams. The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors and product design teams (internal to Intel and external) to develop and deliver quality runsets. The runsets are a key component of the PDK (Process Design Kit) that is used by all design teams at Intel and by external teams designing on Intel process technologies.
As a manager, set
priorities for the team, get results across boundaries, ensure an
inclusive work environment, develop employees, and manage
performance. Plans, provides resources for and directs activities
in engineering function to meet schedules, standards, and cost.
Cultivates and reinforces appropriate group values, norms and
behaviors. Identifies and analyzes problems, plans, tasks, and
solutions. Provides guidance on employee development, performance,
and productivity issues. Plans and schedules daily tasks, uses
judgement on a variety of problems requiring deviation from
standard practices. Inadequacies and erroneous decisions would
cause moderate inconvenience and
expense.
Important behavior traits:
- Drive a customer-oriented culture in the team and provide with fast response times to user issues and concerns.
- Demonstrate experience in analytical problem-solving capability and good teamwork with ability to work across organizational boundaries.
- Proven leadership skills, good influencing skills and communication skills.
Qualifications
Minimum requirements:
Bachelor's degree in Electrical Engineering or related disciplines such as Computer Engineering or Computer Sciences with 8+ years of professional experience in the following:
- Technical management experience managing medium sized teams
- Leading software development project and teams
- Using industry standard software engineering principles and demonstrate ability to drive changes towards industry standard practices and methodologies
- Process design rules for advanced technologies
- Automation of workflows and manual tasks to improve quality and reduce development throughput cycle times
Preferred:
- Ability to understand the technology challenges, and process changes that impact the design rules and other PDK components.
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.
Other
Locations
US, Arizona,
Phoenix;US, California, Santa Clara;US, Texas,
Austin
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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