14 days old

E-core CPU Backend Engineer for Full-Chip Timing

Intel
Austin, TX 78701
  • Job Code
    JR0222935
Job Description

Become a key member of a team participating in the Integration and Verification of a future Intel CPU.

This position requires and Engineer with broad Physical Design and STA skills, coupled with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU design team. We are looking for a highly motivated and technically savvy experienced engineer to drive the timing convergence for Full-Chip models.

As a FC Design Engineer, you will perform constraints management and STA verification. You will also be responsible for coordinating collateral handoffs between the FC Design team and other functions within back-end design such as Clocking, Power Delivery and Partition synthesis/APR. You will drive timing closure and provide collateral for SOC drops.


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

The candidate must have a Bachelor's in Electrical/Computer Engineering and 10+ years of experience OR a Master's degree in Electrical/Computer Engineering and 8+ years of experience in the following:

  • Back-end design and/or integration

  • Static Timing Analysis including constraint generation, clock stamping and timing closure

  • Perl and/or Tcl scripting


Preferred Qualifications:

  • Teamwork and collaboration skills in a high-paced atmosphere

  • Productive under demanding schedules

  • Excellent written and verbal communications skills

  • Self-motivator with strong problem solving skills

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.



Other Locations

US, Oregon, Hillsboro;Virtual US


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$132,940.00-$199,800.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-21 Expires: 2022-07-23

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E-core CPU Backend Engineer for Full-Chip Timing

Intel
Austin, TX 78701

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