About the role:

• Develops and tests Engineering Design Automation tools, creates flows/scripts to analyze and test design methodologies
• Role involves writing efficient code in scripting languages to automatically translate Intel process technology rules and requirements into vendor specific technology library file formats.
• Identify and address custom layout technology file and tool gaps and help drive vendor tool updates. Deploy and test efficiency of tools in achieving design goals and collaborating with design teams on methodology development.
• Design Automation Engineers are advocates of applying design methodologies to help execute projects effectively and successfully with high quality.

This is a EDA Tools Software Engineering position in the Custom Layout Team of the Process Design Kit (PDK) group, within the Design Enablement (DE) organization.

Excellent opportunity for individuals who enjoy working in fast paced team environment with eagerness to learn. The custom layout team works closely with EDA suppliers to provide PDKs to customers on Intel's advanced process technologies.

Important behavior traits we look for:

• Versatile Team player
• Behavioral history with respect to quality
• Customer orientation
• Critical thinker with problem-solving skills
• This is an entry level position and compensation will be given accordingly.

Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum qualifications:
Bachelor's or Master of Science degree in Electrical Engineering, Computer Science, or Computer Engineering with 3+ months experience in the following areas:

• Proficient in programming languages such as Python or Ruby or TCL
• Using the UNIX-Linux operating system is a requirement
• Understand layout design rule concepts
• Object-oriented programming

Preferred:

• Experience with Perl
• Exposure to Cadence or Synopsys custom layout tool (VIRTUOSO-Custom Compiler)

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara;US, Oregon, Portland;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.