About the job:
As an EDA Tools Software Engineer in the Lead Vehicle Development group, you will be responsible for the development of physical design automation tools, flows, methodologies, and processes to support design of Intel's next generation process technology and yield test chips.

Your responsibilities will include, but not necessarily be limited to:

• Development of EDA software tools and flows that automate generation of E-Test structure devices, routing, layout domification, and physical design verification.
• Development of Design Rule Check (DRC) run-set software to implement test structure process design rules.
• Development and support of test chip layout library for the latest process nodes.
• Collaborating with semiconductor process technologists to define test structure designs.
• Troubleshoot design and DRC verification issues with complex physical design flows and tools.

About the team and organization:
Intel's Lead Vehicle Development (LVD) Team is one component of the larger Design Enablement (DE) Organization, that provides design and manufacturing services to a variety of internal and external customers who leverage Intel's holistic design and manufacturing expertise to deliver unique circuits and systems at the leading edge of the technology curve. LVD's mission is to develop test-chips and other hardware prototypes that enable our customers to use Intel's most advanced process technologies to develop innovative products and reduce their time-to-market.

Qualifications

You must possess the minimum qualifications listed below to interview for this position. Preferred qualifications are not required but may give you an advantage in the interview process.

Minimum Qualifications:

Master's degree in Electrical Engineering, Electrical and Computer Engineer, Computer Science, or related engineering discipline AND two or more years of hands-on professional experience in the skills listed below, gained via an internship or full-time employment.

OR

Ph.D. degree in the same academic disciplines listed above with experience in the following:

• Programming and scripting using Cadence SKILL, Python, Tcl, or C++.
• Working with UNIX/Linux computer platforms

Preferred Qualifications:

• Experience with industry standard EDA tools such as Cadence Virtuoso, Synopsys ICV, Siemens Calibre for use in physical design, place and route scripts, and DRC verification.
• Understanding of layout design rules, CMOS physical layout design, VLSI test circuits, device physics and semiconductor processing.
• Development of parameterized cells (PCells or PyCells).

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.