28 days old

Engineers

Xilinx, Inc
San Jose, California
  • Job Type
    Employee
  • Job Status
    Full Time
  • Shift
    1st Shift

Xilinx, Inc. in San Jose, CA seeks:

Senior Software Engineer (job code 81908). Des, dev, troubleshoot & debug SW progs… provide test infrastructure. Reqs incl. MS or fgn equiv. in Info Tech & Mgmt, CS, CE, Electrical Engg or rel, or BS + 5 yrs prog rel exp.

Staff Software Engineer (job code 82644). Research, design & dev of SW tools for Device Modelling of FPGA. Reqs incl. MS or fgn equiv. in Electronics Engg, CE or rel + 2 yrs rel exp.

Senior Design Engineer (job code 82747). Work with team of design & verif engs on verif next gen DSP archit in silicon. Reqs incl. MS or fgn equiv. in Electrical Engg, CE or rel + 3 yrs rel exp, or BS + 5 yrs prog rel exp.

Senior Design Engineer (job code 82790). Contrib to FPGA block, sub-sys & full chip verif. Reqs incl. MS or fgn equiv. in Electrical Engg, CE, CS or rel + 3 yrs rel exp, or BS + 5 yrs prog rel exp.

Senior Design Engineer (job code 82603). Oversee next gen high-speed memory physical-side interface (PHY) design within IO, Clocking & Memory Sub-sys group. Reqs incl. MS or fgn equiv. in CE, Electrical Engg, Electronics Engg or rel + 3 yrs rel exp.

Staff Design Engineer (job code 83043). Design, implem, test, integ & delivery of sys level digital designs for FPGA blocks timing verif. Reqs incl. BS or fgn equiv. in Electronics Engg or rel + 8 yrs prog rel exp.

Staff Design Engineer (job code 82976). Systems & Digital Design Eng for R&D Data Center & Machine Learning Accel team. Reqs incl. PhD or fgn equiv. in Electrical Engg, CE, CS or rel + 2 yrs rel exp or MS + 5 yrs rel exp.

Senior Staff Design Engineer (job code 82702). Define microarch & implem in Verilog, networking DMA designs for data ctr smart NIC apps. Reqs incl. BS or fgn equiv. in Electrical Engg, Electronics Engg, CE or rel + 10 yrs prog rel exp.

System Level Silicon Validation Engineer (job code 80027). Perf sys level silicon validation. Reqs incl MS or frgn equiv in Elctrcl Engg, CS or rel + 6 mo rel exp.

Senior Test Engineer (job code 79840). Research, des, dev, & test Xilinx FPGAs empl knowl of electronic theory & materials properties. Reqs incl. MS or fgn equiv. in Electrical and CE, Electrical Engg, CS or rel.

 

Mail resume to Xilinx, Inc. Attn: Ask HR at 2100 Logic Drive, San Jose, CA 95124-3450. Must ref the relevant job code to be considered. EEO/AA/Vet/Disability Employer.

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Posted: 2020-06-05 Expires: 2020-07-05

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Engineers

Xilinx, Inc
San Jose, California

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