2 days old

Failure Analysis Engineer

Intel
San Jose, CA 95113
  • Job Code
    JR0204804
Job Description

Failure Analysis Fault Isolation (FAFI). In this career growth-oriented Product Development Engineering position, you will be supporting FAFI and silicon debug of FPGA/custom ASIC products on the latest silicon process technology. Your responsibilities will include the following: Performing hands-on/on-site FAFI and silicon debug of Intel's New Gen FPGA/custom ASIC products manufactured on advanced fab process technology like 10nm and 7nm. Responsible for hands-on FAFI, silicon debug readiness and development of advanced tools/processes thru innovation and collaboration with internal and external developers/suppliers. Close interaction and communication with Component Debug and fab teams would be required in accomplishing results. Excellent verbal and written communication skills with results and goal orientation attitude required. The candidate will work closely with the component debug and circuit design team to debug complex silicon issues. The candidate will work to standardize methods in an extremely dynamic environment and use concepts such as Agile Lean manufacturing 6S and Scrum events to organize and streamline workflow.


Qualifications

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or Electrical and Computer Engineering.
5+ years of experience in the following areas: Advanced CMOS VLSI circuits electronics device physics and Fab process flows
Read and interpret advance level circuit schematics and IC layout
Tester usage experience : ATE or other
Wide range of electronics and failure analyses analytical tools operation
Debug techniques such as Optical Probers LVP LVI LADA IREM FIB PicoProber curve tracer oscilloscope
Data analysis experience. Find trends and insights in daily work for permanent quality improvement as well as efficiency

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-22 Expires: 2022-06-22

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Failure Analysis Engineer

Intel
San Jose, CA 95113

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