7 days old

Full Chip verification engineer

San Jose, CA 95113
  • Job Code
Job Description

Come join a creative team of engineers dedicated to designing the hardware technologies that network the leading cloud-service datacenters. We at BXD (Barefoot switching division) at Intel are looking for a motivated and astute individual to join our team as a full chip Verification Engineer. You will be joining a collaborative team responsible for building the world's leading programmable Ethernet switches. Our organization works on all levels of ASIC development, starting from high-level architecture to low-level circuit design and high-volume manufacturing.

Our verification engineers are responsible for building efficient and effective directed and constrained-random validation environments that exercise designs through their corner-cases and demonstrate conformance to specifications. They use their analytic and waveform analysis skills, strong knowledge of digital design, understanding of object-oriented programming, and detailed understanding of IEEE and IETF specifications to verify large networking ASICs comprised of tens of billions of transistors. You will be responsible for development of UVM unit-level benches and tests, developing test plans, coverage plans and coding functional coverage.

The ideal candidate should exhibit the following behavioral traits:

  • Detail oriented problem solving and communication skills
  • Work independently and at various levels of abstraction
  • Thoughtful and perceptive analytical ability
  • A genuine curiosity for understanding the system
  • Dedicated and committed to creative problem solving and assuming responsibility

This position is not eligible for Intel immigration sponsorship.


Minimum Qualifications:

  • BS, MS, or PhD degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
  • 5+ years of experience in System Verilog and UVM
  • 5+ years of experience in developing functional coverage plans and coding coverage
  • 3+ years of experience in MAC/Serdes and Full Chip verification

Preferred Qualifications:

  • 7+ years of experience in VMM / OVM / UVM
  • 6+ years of experience in Switch Silicon verification and Full Chip verification
  • 6+ years of experience in C or C++ for verification
  • Experience with scripting languages, e.g. Python
  • Experience with Synopsys simulation and coverage tools
  • Experience with Serdes and MAC bring up/debug in emulation/silicon

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-19 Expires: 2022-06-20

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Full Chip verification engineer

San Jose, CA 95113

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