13 days old

Graphics Hardware Engineer - TFM

Folsom, CA 95630
  • Job Code
Job Description

Are you passionate about computer graphics? Working in a fast paced, leading-edge environment with endless possibilities of innovating and learning then the Xe IP Engineering Team has an opportunity for you.

The Xe IP Engineering team is responsible for the development of the Graphics IPs. The Front-End-Tools, Flows and Methodology (FE-TFM) Team within Xe IP Engineering is responsible for providing methodologies for Best-in-Class RTL development, IP Delivery, SoC Integration and execution and verification. The team develops and deploys these methodologies across all Graphics IP's.

We are looking for a talented IP Design Methodology engineer to join our team. In this position, the candidate will work on RTL design, integration and quality checks related flows across various clusters and large-scale Graphics IPs. The candidate will rapidly take features from concept to production and provide customer support, debug failures, and provide out of the box solutions.


Responsibilities include:

  • Develop design methodology and CAD flows in various aspects related to RTL development, IP delivery, SoC integration, and signoff checks.

  • Collaborate with the cross functional teams to develop efficient tools and features, along with flows leveraging industry tools.

  • Provide robust, scalable and user-friendly solutions, that can easily be adopted by various Graphics IPs

  • Create flow spec and documentation. Support and train execution teams based on developed tools and flows.

The ideal candidate will have the following skills in addition to the qualifications listed below:

  • Bachelor's in Electrical/ Electronics/Computer Engineering, Computer Science with or related field with 7+ years of industry experience OR a Master's degree with 5 + years of industry experience.

  • Experience in evaluating multiple vendor solutions and driving tool decisions.

  • Must be a team player, with a demonstrated expertise to technically influence others.

  • Willing to ramp up quickly.

  • Solid problem-solving skills.

In addition, you must experience in the following:

  • 5+ years of experience in IP, SoC design and/or integration or RTL design experience.

  • 3+ years of experience with System Verilog and familiarity with a range of internal and 3rd-party logic design tools.

  • 3+ years of experience in FE development flows and tools.

Preferred skills and qualifications that will make you stand out:

  • Knowledge of EDA tools like Synopsys VCS, Design Compiler, Spyglass is a plus.

  • Effective interpersonal and technical presentation skills.

  • Self-starter with passion for growth, real enthusiasm for continuous learning and sharing best practices across the team.

  • Computer Architecture, Verilog Design, Software skills (Python, C++).

Inside this Business Group

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center.  Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Other Locations

US, California, Santa Clara

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-11 Expires: 2022-06-11

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Graphics Hardware Engineer - TFM

Folsom, CA 95630

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