The Systems Architecture and Engineering team is looking for outstanding developed engineers, technical leaders, and technical program managers to drive the next generation computer system architecture. The industry predicts that by 2025 the world would be generating of the order of approximately 175ZB of data, 200T Transactions/day, and all of this needs to be realized on complex software stacks, fully protected regardless of where the data is resident, and run on hardware platforms that are designed to span from the cloud to the edge and everything in-between. There are hard problems that must be solved with customer co-design around security, software, performance, portability, transparency, resiliency, and optimized accelerators.  The end customers performance per dollar and performance per vCPU are critical metrics for improvement while maintaining Scalability, Consistency, Ease of Use, and TCO as top priorities.

You will be part of a team that that is multi-disciplinary and focuses on thinking from tops-down looking at workloads, benchmarks, standards, fabrics, protocols, advanced memory, compute, and accelerator engines while arriving at an innovative systems architecture. Leader candidates are expected to not only closely collaborate with the team in the Office of Technology, but also with our partner Business Units and top customers to create solutions that we can win as One Intel.

In this engineering role, you will:

• Provide technical knowledge and skills to teams working on co-design problems

• Contribute to an overall vision and eventually strategic leadership in the Systems Technologies area in the Office of CTO

• Contribute to identifying System Architecture trends driven by emerging use cases, workloads, and customer collaborations

• Be capable of defining or contributing to the definition and proposal of future pathfinding projects to generate new IP (HW and SW) across the breadth of Intel's product portfolio to create better-together solutions

• Be capable of leading and mentoring junior technical leaders and engineers in the extended orgs to deliver projects and share knowledge

• Be capable of working with BU counterparts to drive capabilities and features into products

Qualifications

Candidate must have a Bachelor's degree in Electrical/Computer Engineering, Computer Science or related field with 6+ years of experience OR a Master's degree in Electrical/Computer Engineering, Computer Science or related field with 4+ years of experience.

To be most effective in this role, you will:

• Possess fundamental systems architecture knowledge

• Contribute some technical leadership in the areas of computer architecture, data center engineering, modern trends in software programmatic models, and/or security principles and implementations

• Facilitate loose collaboration with diverse disciplines and teams - working through ambiguity, strong communication skills, and ability to influence are essential

Preferred Qualifications:

For those focused on hardware-centric opportunities, clear skills with at least six of the following topics are desired:

• Verilog, System Verilog, and optionally SystemC designs

• ASIC RTL design

• Analog design

• FPGA RTL design

• PCIe, CXL, LPDDR, DDR, SRAM, HBM, AIB, UCIe, XSR/USR, and related IP use and/or modification in designs

• Scalable System Architecture Definition and Simulation experience

• Porting RTL to FPGA platforms and subsequent optimization

• Formal validation methods and application

• Industry standard EDA tools

• EDA scripting for Continuous Integration, regression infrastructure, and tool enhancements

• Emulation platform use, partitioning, and optimization with standard tools such as Veloce or HAPS

• Micro-architecture definition and RTL development

• Background in caching and coherency architecture and design

• experience with computer architecture, microprocessor, or chip-set design methods

• DFX definition and methodology, implementation and verification

• background in x86 ISA

• microprocessor pipeline architecture and design/implementation

• Synopsys DC for synthesis and timing analysis

• Power and thermal design analysis and modeling

• post-silicon debug experience

development of parallel and distributed computing algorithms and/or frameworks

Intel Security Architecture and Engineering (SAE) is chartered with developing a comprehensive understanding of current and future security threats, guiding research, and developing solutions and mitigations. SAE develops security architecture and implementation across Intel products.

Other Locations
Virtual US and Canada; US, California, Santa Clara; US, California, Folsom; US, Arizona, Phoenix;

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$113,500.00-$170,120.00