4 days old

IC Packaging Engineer

Cupertino, CA
  • Job Code
    200000909

Summary

Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? We are looking for a talented and passionate IC Packaging Engineer to join our team

In this highly visible role, you will own and drive advanced package selection, new product package structure and configuration optimization. You will be responsible for package/SIP layout, optimization, design verification and taping out

Key Qualifications

  • Minimum 5+ years hands on experience with Cadence APD/SIP
  • Solid signal and power integrity fundamentals
  • Must have experience in package design, design for manufacturing review
  • Familiar with layout review tools such as CAM350/Valor or Calibre
  • 2D/2.5D and 3D package connection, memory package, stacked die substrate design experience
  • Familiar with BGA package substrate technologies
  • Experience preferred in schematic capture, layout and design using Cadence Allegro Schematic Design Entry (Concept HDL) design tools is a plus
  • Exposure to Unix environment, scripting languages (PERL, Python, TCL and/or shell) and methodology is a plus

Description

Interface and coordinate with cross-functional groups throughout Apple on new product package/SIP selection, feasibility analysis and design
Implement the physical design of SIP, SoC and memory chips
Work cross-functionally, understand trade-offs, constraints, and optimizing silicon floor plan, bump and package pin out
To optimize signal/power integrity of package/SIP design
Drive methodology, innovations, and productivity improvements in package design together with vendors and developers on feature development and bug resolution

Education & Experience

BS or MS Electrical Engineering, Mechanical Engineering, Materials Science or Physics required and relevant experience within technical discipline. PhD is a plus.

Posted: 2019-11-07 Expires: 2019-12-06

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IC Packaging Engineer

Apple, Inc.
Cupertino, CA

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