About the Group:
As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.

About the Role
Intel Foundry Services is looking for a customer centric standard cell library engineer who has the industry experience in developing and deploying library offerings with best-in-class power, performance, and area (PPA) for foundry process technology nodes - to allow foundry customers to evaluate the technology PPA offerings in a systematic way. This role will require you to collaborate with IFS customers' design teams and Intel's internal technology and design teams to align on feature requests, methodologies and enhance library offerings on IFS technology nodes.

Responsibilities:

• As part of the L1 (Level 1) support team synthesize customer standard cell library requirements and work with Intel's technology and engineering teams to help the enhancement of library offerings and characterization kit to provide best-in-class library solutions.

• Help establish a low voltage library methodology to design and validate through pre and post silicon phases for design robustness and competitive offering as part of the portfolio.

• Along with the team help drive industry standard PVT methodology to augment existing methodology to support and address customer and market segment needs and help establish IFS as a foundry of choice.

• Influence and enable standard cells characterization methodology to generate industry standard EDA views critical for power delivery, ATPG, Liberty Timing, Noise, APR, GDS, LEF, NDM, layout parasitic view, and spice/Verilog views.

• Be part of the team that automates for characterization kit bundling, functional validation, quality checking, performance, and reliability verification, and enhancing flows for greater design productivity and faster turnaround time.

• Complex problem solving and decision-making skills with background in results orientation.

Qualifications

Minimum :
Bachelor of Science in Electrical or Computer engineering with 5+ years of industry experience OR

Master of Science in Electrical Engineering, Computer Engineering with 3+ years of industry experience OR

PhD in Electrical Engineering, Computer Engineering with 2+ years of industry experience

Experience in the following areas:

• Extensive experience with standard cell library content definitions, extraction, characterization, liberty models, device variation, Sil2Sim debug and analysis.

• Experience in digital circuit design, including CMOS combinatorial logic and sequential element design and layout.

• Standard Cell Library design, extraction, characterization, validations experience in one or more areas - Circuit Design, Physical Design, Front End Design, Simulation, Timing Analysis, Reliability Analysis

• Strong understanding of CMOS device physics

• Experience with: Python, Perl, TCL, Shell scripting

• Experienced in industry standard placement and routing CAD tools

• Floor planning, power grid setup, Clocking methodologies (CTS, MSCTS etc.)

Preferred:

• Floor-planning and power grid setup, clocking methodologies, IR droop and SI mitigation strategies, power, and timing signoff conditions, and leveraging the industry standard tools, flows, and methodology to drive the correct PPA tradeoffs.

• Background in Artificial Intelligence and Machine Learning (AI-ML) will be a plus. IR drop, Experienced in Electromigration (EM) and Reliability Verification (RV) and Signal Integrity and Crosstalk mitigation signoff methodologies using industry standard tools.

• Low voltage circuit design used in standard cell library design and development is a plus.

• Experienced talent from competitive foundry company(s) preferred

As an integral part of Intel's new IDM2.0 strategy, we establish Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to Intel's CEO. IFS will be a world-class foundry business and a major US and European-based capacity provider to serve customers globally. We differentiate IFS with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe, plus a world-class IP portfolio including x86 cores, graphics, media, display, AI, interconnect, fabric, and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions using industry-standard design packages. Intel dedicates IFS to the success of its customers with entire Profit and Loss responsibilities. This model will ensure that our foundry customers' products will receive our utmost focus in terms of service, technology enablement, and capacity commitments. IFS is already engaged with customers today, starting with our existing foundry offerings. We are expanding imminently to include our most advanced technologies optimized for cutting-edge performance, making them ideal for high-performance applications.

Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.