21 days old

IP Logic Design Engineer

San Jose, CA 95113
  • Job Code
Job Description

Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, lets do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Intels mission is to shape the future of technology to help create a better future for the entire world. By pushing forward in fields like AI, analytics and cloud-to-edge technology, Intels work is at the heart of countless innovations. From major breakthroughs like self-driving cars and rebuilding the coral reefs, to things that make everyday life better like blockbuster effects and improved shopping experiences theyre all powered by Intel technology. With a career at Intel, you have the opportunity to help make the future more wonderful for everyone.

Intel is revolutionizing cloud networking. The Ethernet Product Group is growing. Are you an experienced Logic design engineer? Join us and change the way the world communicates. Intel's Ethernet Products Group is looking for a talented and enthusiastic Logic Designer to join our growing team and take part in developing state of the art NIC (Network Interface Controller) products that will move the data with higher speeds in the Data Center and enrich the lives of every person on Earth. As part of your role, you will work on advanced large-scale networking logic designs, from architecture to tape-out. You will lead one of the chip's subunits from definition to implementation and you'll also be involved with validation, backend and SOC integration processes. #IPU_Go_Big


  • Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
  • Participates in the development of Architecture and Microarchitecture specifications for the Logic components.
  • Provides IP integration support to SoC customers and represents RTL team.


Minimum Qualifications:

  • Bachelors in Electrical Engineering, Computer Engineering  or related field with 9+ years of experience or Masters degree in Electrical Engineering, Computer Engineering or related field with 6+ years of experience.
  • Experience in chip design with the entire development flow from definition to Tape-Out.
  • Experience in usage of standard ASIC EDA tools for Lint, CDC, RDC, Synthesis, LEC etc.
  • Experience in RTL Design.
  • Experience in Logic Debug.

Preferred Qualification:

  • Experience with Networking design.
  • Experience in system Verilog design/test benches.
  • Experience in Multiple clock domain and Low power design.
  • Simulation and debug experience using VCS/Verdi.
  • Scripting , Perl / C-shell, and / or Python.

Benefits Statement:

Here at Intel, we invest in our people. Beyond health, dental, and retirement benefits, Intels benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, four-week paid sabbatical every four years of employment, family planning care including adoption and fertility assistance, and over 45 diverse employee resource groups for networking and advocacy.  Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program.  

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, Oregon, Hillsboro;US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-07 Expires: 2022-07-08

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IP Logic Design Engineer

San Jose, CA 95113

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