24 days old

IP Pre-Silicon Val Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0219905
Job Description

Are you passionate about disrupting the industry with your innovation? Working with a diverse group? Influencing the outcome? If so, then Accelerated Computing Systems and Graphics (AXG) Team has an opportunity for you. In AXG we are responsible for delivering industry-leading GPU (3D, media, compute, and display) hardware, intellectual property (IP) blocks and system-on-a-chip (SoC) products for discrete graphics and throughput computing. We strive to lead the industry through continuous innovation and world-class engineering. We work closely with partners across Intel and we are looking for a IP Pre-Silicon Validation Engineer to join our team.

In this position, you will be working as part of a Pre-silicon IP Verification Team working on a SoC Fabric IP for our next generation Graphics Product line.

Candidate responsibilities include the following:

  • Define scalable and re-usable architecture for verification environment which would be used for current and future generation of SoC Fabric IP 
  • Develop test environment, verification specification documentation and collaborate with architecture, design and other verification teams.
  • Coding/enhancement of functional scoreboards/agents/sequences/monitors
  • Define functional coverage and write back annotatable verification plans.
  • Developing tests in  UVM/SV/C according to test plans
  • Guide and mentor junior engineers and contract workers
  • Manage and update overall verification dashboard

Behavior traits that we are looking for:

  • Good communication and collaboration skills.
  • Ability to work independently and proactively to lead technical activities and bring them to closure
  • Ability to break down complex problems into manageable tasks 


Qualifications

Must have a Bachelor's in Electrical/Computer Engineering, Computer Science or related field with 6+ years of relevant experience. OR a Master's degree in the same fields with 4+ years of experience:

Your experience must be in the following:

  • Expertise in verification of design blocks (IP) for system-on-chip (SoC) components
  • Expertise in System Verilog and OVM or UVM based verification methodologies
  • Experience in OOP concepts and coverage based random validation

Preferred skills and experience that will make you stand out:

  • Good understanding of SoC fabric protocols such as CXL, CCIX(or PCIe Gen-5)
  • Hands on experience of defining verification environment architecture for a complex IP or SoC 
  • Good understanding of cache coherency concepts  

Inside this Business Group

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center.  Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.



Other Locations

US, California, Santa Clara;US, Massachusetts, Hudson;US, Oregon, Hillsboro


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-27 Expires: 2022-05-28

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IP Pre-Silicon Val Engineer

Intel
Folsom, CA 95630

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