14 days old

IP RTL Logic Design Engineer

Intel
Hudson, MA 01749
  • Job Code
    JR0221921
Job Description

In the IP Engineering Group (IPG), our vision is to build leadership IPs that power Intel's and our customer's winning products. We are on an exciting journey to transform IP at Intel. Intel's willingness to achieve product leadership starts with the innovations created by this world class team of engineers.

In the role of IP Logic Design Engineer, you will be responsible for the following:

  • Define microarchitecture and write IP specifications.

  • Implement design in RTL.

  • Collaborate with pre-silicon validation team to develop functional test plans.

  • Collaborate with post-silicon to resolve silicon level sightings.

  • Collaborate with physical design team on floor planning and timing closure.

  • Stay involved through the full product development cycle from new feature concept, feasibility assessment and planning, and execution.

What we offer:  

  • We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth.  

  • As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results.  

  • We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).  

  • We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and much more creative perks that make Intel a Great Place to Work!  

  • We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today. 


Qualifications

You must possess Minimum Qualifications (listed below) to be initially considered for this position. Preferred Qualifications (listed below) are in addition to the minimum qualifications are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • BS or MS degree in Electrical or Computer Engineering or related fields.

  • 5-7 years of overall experience performing RTL logic design using System Verilog.

  • Experience in the last 4 years with RTL development, design partitioning, micro-architecture trade-offs , and high speed digital logic design (including timing closure).

  • Experience in the last 4 years working with validation engineers to develop functional validation and coverage test plans.

  • Experience using scripting languages in design automation using with languages such as TCL, Perl, JSON, Python.

  • Solid problem solving and debugging skills and willing to work closely with various chip design disciplines and cross site teams.

  • Proven verbal and written communication skills.

  • Motivated, self-directed, and able to work effectively both independently and in a cross-site team environment.


Preferred Qualifications:

  • Experience in Design for Test (DFT) and Design for Debug (DFD) in a large chip development environment.

  • Willing to debug errors in various cad tools (Synopsys SOC IP integration tools (coreBuilder, coreAssembler, vcs, etc).

  • Experience with multi-power domains and multi-clock designs.

  • Experience with large scale server designs.

  • Good level of understanding of the power Management, reset, clock, and power domain challenges for large SoCs.

  • Experience dealing with Inter IP floor planning and timing, willing to work closely with Physical designers.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Santa Clara;US, Colorado, Fort Collins;US, Oregon, Hillsboro


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$113,500.00-$170,120.00


Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, and benefit programs. Find more information about our Amazing Benefits here

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-16 Expires: 2022-07-17

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IP RTL Logic Design Engineer

Intel
Hudson, MA 01749

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