14 days old

Lead Formal Verification Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

Intel is seeking highly qualified candidates to join XFG  (Switch and Fabric Group) as a Formal Verification Engineer!


Come join a creative team of engineers dedicated to designing the hardware technologies that network the leading cloud-service datacenters.  We are looking for a motivated and astute individual to join our team as a Formal Verification Engineer.  

As a FV Engineer, you will be leading the complete Formal Verification for single or multiple design blocks and IPs. You will be responsible for:

- Identifying blocks suitable for Formal

- Working with block designers to understand micro-architectural details

- Identifying and implementing Formal properties

- Applying abstraction techniques

- Signing off with bound analysis and coverage

- Participating in test-plan and test-bench reviews

The ideal candidate will have the following skills in addition to the qualifications listed below.

- Thoughtful and perceptive analytical skills

- Dedicated and committed to creative problem solving and getting things done

- Excellent attention to detail

- Excellent communication and teamwork skills


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Required Qualifications:

Bachelor's degree or higher in Electrical or Computer Engineering, Computer Science, or related field.

- 6+ years of experience with RTL designs (either in design or verification)

- Experience with System Verilog, System Verilog Assertion Language (SVA) or equivalent

- Understanding of Formal verification concepts


Additional Preferred Qualifications:

Masters degree or higher in Electrical or Computer Engineering, Computer Science, or related field.

- Experience with application of Formal verification techniques including abstractions

- Hands on experience with industry-standard Formal verification tools

- Familiarity with bug-hunting strategies and coverage analysis

- Experience with various FV tool apps (C vs RTL, RTL to- RTL equivalence, Connectivity, ..)

- Profound understanding of Formal verification engines

- Proficiency in scripting languages. eg. Python/Perl/TCL

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-11 Expires: 2022-06-11

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Lead Formal Verification Engineer

Santa Clara, CA 95050

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