2 days old

Lead Model Development Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

Come join a creative team of engineers dedicated to designing the hardware technologies that network the leading cloud-service datacenters. We are looking for a motivated and astute individual to join our team as an ASIC Model Development Engineer. You will be joining a collaborative team responsible for building ML/AI accelerators for the world's leading programmable Ethernet switches. Our organization works on all levels of ASIC development, starting from high-level architecture to low-level circuit design and high-volume manufacturing.

Our Model development engineers are responsible for building ASIC Models which are used in verification as well as SW development by SW teams internal and external. They use their understanding of object-oriented programming, and detailed understanding of IEEE and IETF specifications or CPU or ML/AI space to develop high level representations of large networking ASICs comprised of tens of billions of transistors. You will be responsible for development of models to represent various ASIC blocks for ML/AI chip which will be used to verify the chip as well as SW development.

The ideal candidate should exhibit the following behavioral traits:
- Detail oriented problem-solving and communication skills.
- Work independently and at various levels of abstraction.
- Thoughtful and perceptive analytical person.
- A genuine curiosity for understanding the system.
- Dedicated and committed to creative problem-solving and assuming responsibility.


You must possess the below minimum qualifications to be initially considered for this position preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.


Education Requirement:

- BS, MS, or PhD degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.


Minimum Qualifications:
- 6+ years of experience in C/C++/System C.
- 6+ years of experience in developing SW models for ASIC.

Preferred Qualifications:

- 10+ years of experience in C/C++/System C.
- 6+ years of experience in development models for Switch Silicon.
- 2+ years of experience in developing SW models for ML/AI ASIC.
- 2+ years of experience with scripting languages, e.g., Python.

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.

Posted: 2022-05-25 Expires: 2022-06-25

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Lead Model Development Engineer

Santa Clara, CA 95050

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