4 days old

MDCx Circuit Marginality Validation System Engineer

Intel
Santa Clara, CA 95050
  • Job Code
    JR0220811
Job Description

Responsibilities of the role include, although not limited to:

  • Creates, defines and develops system validation environment and test suites.

  • Uses and applies platform level tools and techniques to ensure performance to spec.

  • Responsible for the development of methodologies, execution of validation plans, and debug of failures.

  • Requires broad understanding of multiple system areas and requires interfaces with Architecture, Design, and Post-silicon Validation teams in improving test content and providing feedback for future Processor designs.

  • This specific CMV job role is working with next generation Server Processor in a PC format where each processor will be uniquely characterized to ensure maximum performance.

  • You will be required to have an understand of PC and compute system architecture and the willingness to run various content to create electrical marginalities.

  • Your job will be focused on finding electrical failures and then identifying 100 percent solutions to ensuring each processor will not fail while in use by the end customer.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences.

This is an entry level position and will be compensated accordingly.

NOTE: This position is not eligible for employment-based visa/immigration sponsorship for those with a Bachelor's degree and less than 3 years of experience. Intel sponsors individuals for employment-based visas for positions where we experience a shortage of US Workers. These skills shortage roles are typically STEM contributing positions requiring a Master's or PhD degree, or a Bachelor's degree with three years' related job experience.

You must possess the below minimum qualifications to be initially considered for this position.

Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates.


Minimum Qualifications:
Candidate must have a Bachelor's degree in Electrical Engineer, Computer Engineering, Computer Science or a related field and 1+ year experience.

OR

Master's degree in Electrical Engineer, Computer Engineering, Computer Science or a related field with experience in the following:

  • Microprocessor and system architecture.

  • Software programming or software debug skills in Unix, C# or Python.

  • Windows and/or Linux operating systems.

  • PCI, memory, hard drives and other PC peripherals.


Preferred Qualifications:
Experience in:

  • Semiconductor testing.

  • PC Testing.

  • Leverage automation tools for repeatable PC testing of Server Processors.

  • PC system test structure and think uniquely about methods and processors to complete margin testing.

  • Code in python including objects and libraries.

Inside this Business Group

Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-23 Expires: 2022-07-24

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MDCx Circuit Marginality Validation System Engineer

Intel
Santa Clara, CA 95050

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