13 days old

MDCX Product Development Engineering Manager

Intel
Santa Clara, CA 95050
  • Job Code
    JR0217330
Job Description

The Manufacturing for Data Center Xeon (MDCX) organization in Manufacturing Product Engineering (MPE) is looking for energetic and passionate technical engineering manager to manage, lead, and grow a team for the development of Xeon server products' high volume manufacturing test methodologies and quality screens for on-die Arrays and external memory on package. The candidate will work in a highly collaborative cross-site environment not only within MDCX but with many partner organizations in supportive of Intel's quality commitment to our customers.

As a manager, the candidate will set priorities for the team, get results across boundaries, ensure an inclusive work environment, develop employees, and manage performance.

  • Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost.

  • Cultivates and reinforces appropriate group values, norms and behaviors.

  • Identifies and analyzes problems, plans, tasks, and solutions.

  • Provides guidance on employee development, performance, and productivity issues.

  • Plans and schedules daily tasks, uses judgement on a variety of problems requiring deviation from standard practices.

  • Inadequacies and erroneous decisions would cause moderate inconvenience and expense.


Qualifications

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

  • Bachelor of Engineering with minimum 10+ years of experience.

OR

  • Master of Engineering with 7+ years of relevant experience in digital design, high volume manufacturing, silicon manufacturing test development, or a related field.


Preferred Qualifications:

  • Experience as people manager of a technical team.

  • Experience in leading task forces solving complex technical problems.

  • Knowledgeable in Array DFTs (PBIST, MBIST, CABIST) or other digital test methodologies.

  • Experience in project management.

  • Exceptional analytical, debug, and communication skills.

  • Good collaboration skill to interface with stakeholders, including cross-site partners.


Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-02 Expires: 2022-06-02

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MDCX Product Development Engineering Manager

Intel
Santa Clara, CA 95050

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