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Job CodeJR0216964
Designs, develops, modifies and evaluates complex analog and mixed signal electronic parts, components or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems. Determines creative design approaches and parameters. Analyzes equipment to establish operating data. Conducts experimental tests and evaluates results. Applies and uses independent evaluation to selects components and equipment based on analysis of specifications and reliability. Evaluates practical capability of vendor to support product development. Also includes Analog, MixedSignal and RF Development Engineers with specialized skills and expertise in developing Monolithic Integrated Circuits for wireless and wireline communications systems and products using CMOS, BiCMOS, SiGe, GaAs Process technologies.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates
Minimum Qualifications:
- MS in Electrical Engineering or related field with 3+ years of professional experience Memory/Mixed-signal IC designs, including but not limited to:
- Feature and specification definition of potential circuits such as memories, op amps, bias circuits, Charge Pumps etc.
- Exploration of novel, robust, competitive circuit solutions (considering power, area and performance) through feasibility studies including transient circuit simulation, Monte Carlo simulation, stability/Pole-Zero analysis, circuit aging and electrical overstress analysis.
- Effective schematic capture and behavioral modeling of circuits in Verilog, as well as logical equivalence verification between schematic and Verilog models.
- Physical verification of circuit through layout-extracted static timing analysis (STA), electrical rules' check and noise analysis.
- Reliability verification of layout: IR drop, electro-migration and self-heat analysis.
- Circuit design convergence using industry standard design and validation tools.
- Layout strategies, and techniques (including analog techniques) to meet variance, timing, noise, and reliability requirements.
- Device physics and process technology, especially as it applies to
- Memory/Mixed-signal designs.
Preferred
Qualifications:
- Experience in scripting languages (perl, tcl, etc.) to enhance design automation, verification, and delivery
- Experience in Post-Si debug from design perspective, including proposing tests and experiments, and reviewing results.
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.
Intel
strongly encourages employees to be vaccinated against COVID-19.
Intel aligns to federal, state, and local laws and as a contractor
to the U.S. Government is subject to government mandates that may
be issued. Intel policies for COVID-19 including guidance about
testing and vaccination are subject to change over
time.
Posting
Statement
All qualified
applicants will receive consideration for employment without regard
to race, color, religion, religious creed, sex, national origin,
ancestry, age, physical or mental disability, medical condition,
genetic information, military and veteran status, marital status,
pregnancy, gender, gender expression, gender identity, sexual
orientation, or any other characteristic protected by local law,
regulation, or
ordinance.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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