2 days old

Memory Design Engineer

Hillsboro, OR 97123
  • Job Code
Job Description

You will be part of the Corporate Memory Organization Memory Compiler Team, joining a fast-paced dynamic environment working on digital designs, in a fast-paced and technically challenging environment.

Responsibilities of the role will include, but not be limited to:

  • Develop pre-silicon functional coding and validation tests to verify memory will meet design requirements.

  • Create test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.

  • Analyze and use results to modify testing, RTL logic design and verification, IP design and integration, and design automation.

  • Interfacing with customers.

In addition to the qualifications listed below, the ideal candidate will demonstrate:

  • Logical thinking.

  • Analytical and problem-solving skills.

  • Excellent verbal/written communication skills.

  • Interpersonal skills, and being motivated to accept challenges and to flourish together with a team.

  • Multitasking/prioritization skills.

What we offer:
We give you opportunities to transform technology and create a better future, by delivering products that touch the lives of every person on earth.
As a global leader in innovation and new technology, we foster a collaborative, supportive, and exciting environment where the brightest minds in the world come together to achieve exceptional results.
We offer a competitive salary and financial benefits such as bonuses, life and disability insurance, opportunities to buy Intel stock at a discounted rate, and Intel stock awards (eligibility at the discretion of Intel Corporation).
We provide benefits that promote a healthy, enjoyable life: excellent medical plans, wellness programs, and amenities, time off, recreational activities, discounts on various products and services, and much more creative perks that make Intel a Great Place to Work!
We're constantly working on making a more connected and intelligent future, and we need your help. Change tomorrow. Start today.


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:
Candidate must have a Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science and 6+ months of experience.
Master's degree in Electrical Engineering, Computer Engineering, or Computer Science.
PhD in Electrical Engineering, Computer Engineering, OR Computer Science:

  • Knowledge of UVM, System Verilog/Verilog.

  • Scripting (Perl, Tcl, Python, etc.) development/coding, to develop automated compiler testbenches and support or enhance as required.

  • Logic design convergence tools including: formal equivalence verification, RTL coding/validation.

  • Some familiarity w/ memories is a plus.

  • Experience can be from work experience, school experience/projects or a combination of both.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.

Other Locations

US, California, Santa Clara

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-24 Expires: 2022-07-25

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Memory Design Engineer

Hillsboro, OR 97123

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