21 days old

Memory Logic Design and Validation Engineer

Intel
Austin, TX 78701
  • Job Code
    JR0221938
Job Description

About the role:

Memory Logic Design and Validation Engineer role has a single purpose which is to solve our most challenging product issues. SOC Debug Engineers work with our internal product teams (Manufacturing/Validation/Software) and our customer teams during critical escalations to rootcause system level failures and/or anomalies directly impacting our customers or jeopardizing our committed timelines. They are responsible for performing lowlevel and complex debug across multiple IP and system domains within a product, and will use their experience with/understanding of SOC design and architecture, Firmware, Bios and software to completely understand any issue and drive a resolution. They are also expected to drive innovative debug capability improvements through new Design for Debug (DFD), debug tools and scripts to continuously improve the debug discipline


Qualifications

Minimum Requirements:
MS in Electrical Engineering or related field with 3+ years of professional experience in Logic design and pre-Si verification using System Verilog in a UVM environment, including but not limited to the following:

  • Micro-architecture definition of design features and functional verification.
  • UPF (Unified Power Format) creation using VCLP and low power techniques
  • Verification of behavioral models through industry standard tools such as Spyglass
  • Clock-domain-crossing (CDC) or Reset-domain-crossing (RDC) verification expertise



Preferred Requirements:

  • Knowledge of behavioral modeling using Verilog and System Verilog coding
  • Experience in scripting languages (Perl, TCL, etc.) to enhance automation in design, verification and testing
  • Effective behavioral modeling and testing of Digital and Mixed-signal circuits in Verilog and System Verilog, as well as logical equivalence verification between schematic and Verilog models.
  • JTAG and other industry-standard protocols, state machines, memory logic design and verification

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-04 Expires: 2022-06-04

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Memory Logic Design and Validation Engineer

Intel
Austin, TX 78701

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