Intel is looking for highly motivated individuals, with strong technical background, capabilities, and experience to sustain, ramp, and transfer 10nm and beyond technologies using state of the art equipment, materials, and techniques. They will drive rapid continuous improvements in safety, quality, yield, reliability, cost, process stability/capability, and productivity while maintaining rigorous CE (Copy exactly) and best tool matching within the Intel factory network.

The OTF Yield and Integration Department Manager works a shift 1 schedule reporting to the Fab Operations Vice President and will be responsible for but not limited to:

• Managing a team of technical managers and senior technologists.   
• Partnering with the Intel factory network and the technology development team.       

The ideal candidate should exhibit the following behavioral traits:

• Problem solving: Demonstrated experience with rapid analysis of complex process problems and identification of a solution path.
• Teamwork skills and partnership skills.
• Effectively communicate, written and verbal communication skills to successfully summarize and communicate horizontally and upward to influence action.
• Motivated self-starter, with strong ability to work independently as well as in a team environment.
• Think and operate independently, while simultaneously focusing on many diverse priorities.
• Flexibility and maturity in facing uncertainties and changing priorities/responsibilities.
• Commit to aggressive goals and win with a can-do attitude.
• Act with velocity and a strong sense of urgency.
• Respect cultural diversity and sensitivity.
• Agility in learning, improving, and innovating.
   

Preferred Qualifications:

• 10+ years of relevant experience in 300mm startup and ramp of advanced logic process technologies; and planning/execution of a yield enhancement roadmap.
• Experience working with Yield Analysis tools (techniques and systems), Process Engineering knowledge, Process Control, device knowledge, materials analysis techniques and Fault Analysis Layout sensitivities to identify Product Yield issues and drive EOL Yields to Best in Class.
• Knowledge of module tool impacts to defects, inline parametrics and yield through PM life while understanding upstream and downstream impacts to other tools.
• Skills to develop continuous improvement projects at module level to improve process to give reliable, High yielding, cost effective products.
• Experience in Process Integration of FINFET, Strained SiGe , Hi K dielectric+Metal Gate, immersion Lithography plus spacer based double and quad patterning, driving continuous improvement projects to achieve Best in Class yielding, reliable products.
• Strong Process flow integration knowledge including understanding of defect formation/evolution, process integrated defect and yield impacts, demonstrated influence across multifunctional fab groups to drive action to reduce defect density and drive yields higher.
• Experience driving yield roadmaps working in multi discipline team with Process Engineers, Integration Engineers and Yield Analysis to deliver reliable, cost effective and stable/capable products.
• Experience working on process transfers to High Volume Manufacturing Factories, solving complex integrated issues delivering matched yields and product performance.
• Understanding of Layout sensitive defects, Design for Testability and knowledge of raster, scan diagnosis and other LYA data systems.
• Knowledge of yield analysis techniques and systems, understanding of processing techniques (Lithography, Etch, Implant, CMP, CVD, plating, diffusion, thin films, etc), yield engineering data analysis tools, and working knowledge of semiconductor devices.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position.  Qualifications listed as preferred or additional will be considered a plus factor for applicants.

Minimum Qualifications:

Candidate must possess a Bachelor's degree, Master's degree or Ph.D. Degree in Electrical Engineering, Material Science, Chemical Engineering, Microelectronics Engineering, Mechanical Engineering, Optical Engineering, Chemistry, Physics or related field and 10+ years of experience in:

• Yield data analytics skill (data query, cleaning/sanity check, preparation, data analysis/statistical method (via JMP), visualization, drawing conclusion).
• Wafer fab environment on Semiconductors, Device and Yield Analysis tools

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter....

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.