29 days old

Packaging Research and Development Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0211515
Job Description

Assembly and Test Technology Development (ATTD) Microelectronic Packaging Engineers provide package design, project management, and development-sustaining support for integrated circuits, semiconductor assemblies, and various other electronic components and/or completed units.

  • Responsible for the thermal and/or mechanical and/or electrical design analysis and development of electronic packages.

  • Package Design Engineer defines the overall package performance and specification and realizes technology certification boundary through product package and/or test vehicle layout design.

  • Conducts tests and research on basic materials and properties.

  • Establishes material specifications for contract assemblers and raw material vendors and interfaces with Quality Assurance and Purchasing regarding material quality and vendor performance.

  • Provides consultation concerning packaging problems and improvements in the packaging process.

  • Communicates and responds to customer requests and participates in customer engaging events as they occur.

  • Develops solutions to problems utilizing formal education and judgment.


The candidate should also exhibit the following behavioral traits and skills:

  • Team player with experience collaborating with customers.

  • Communication and stakeholder management skills.


This is an entry level position and compensation will be given accordingly.


Qualifications

You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Requirements:

  • Possess a Bachelor's or Master's degree with 6 months of experience in Electrical Engineering, Mechanical Engineering, or Material Sciences disciplines.

  • Experience and/or exposure with microelectronic package or PCB physical layout design.

  • Familiarity with package design tools like Mentor Graphics Xpedition, Cadence Allegro, AutoCAD, or SolidWorks.


Preferred:

  • Experience in microelectronic package substrate design and/or technology development.

  • Familiarity with microelectronic package electrical modeling and simulation tools such as PowerDC, HyperLynx, Q3D, and HFSS.

  • Experience with scripting using Python, VB, C, and or other languages.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Other Locations

US, Oregon, Hillsboro


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-22 Expires: 2022-05-23

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Packaging Research and Development Engineer

Intel
Phoenix, AZ 85003

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