17 days old

PDK Software Engineer - VLSI Physical Verification

Intel
Hillsboro, OR 97123
  • Job Code
    JR0221228
  • Jobs Rated
    8th
Job Description

The job requires partnering and leveraging domain experts across various areas of Technology Development, EDA vendors, and product design teams to develop and deliver high quality technology collaterals, models, and enablement of EDA tools.

Responsibilities include:

  • Develop physical layout verification design rule checker (DRC), Layout vs Schematic (LVS), and RC extraction runsets using industry standard EDA tools (Synopsys ICV, Siemens/Mentor Calibre, and Cadence Pegasus)Work with the process development teams at Intel to define specifications for DRC, LVS, and RC extraction runsets
  • Coordinate development of technology features, develop QA plans, and drive test-cases development working with relevant stakeholders
  • Support PDK development and Intel design teams to debug and enhance runset quality and enhance runtime and usability of the runsets
  • Engage with internal partners and external EDA vendors to coordinate tool feature requirements and specification
  • Assess architecture and hardware limitations, plans technical projects in the design and development of CAD software
  • Help library teams at Intel with technology path finding activities

Important behavior traits we look for:

  • Creative, independent, and out of the box thinker with strong problem-solving skills and analytical ability
  • Drive innovation and initiatives to enhance existing automation, tools, and methodology
  • Depth and breadth being able to connect the dots and identify cross-discipline optimal solutions
  • Self-motivated, strong leadership skills being able to influence across internal and external ecosystem
  • Written and verbal communication skills to present complex issues with clarity to drive decisions
  • Soft skills to work with cross-functional and cross site teams and influence multiple internal and external stakeholders
  • Cultivate and reinforce appropriate group values, norms, and behaviors

About the team

As part of the Design Enablement/Process Design Kit (PDK) group, you will join a highly motivated team of talented engineers solving challenging technical problems, enabling PDKs for Intel's most advanced process technologies, and drive PDKs towards industry standard methods and ease of use for the end customers.


Qualifications

Minimum Qualifications:
Bachelor of Science in Computer Engineering (CE), Electrical Engineering (EE) with 3+ years of semiconductor industry experience OR Master of Science in CE, EE with 2+ years of semiconductor industry experience.

Required semiconductor industry experience in the following areas:

  • DRC/LVS/Extraction runsets and EDA tools (Synopsys ICV, Siemens/Mentor Calibre, and Cadence Pegasus, and simulation tools)
  • Unix/Linux operating system
  • At least one of the following: C++, Python, Perl, TCL
  • VLSI design process, reliability verification, ESD concepts, standard cell library, and memory architectures


Preferred Qualifications:

  • Knowledge in semiconductor device physics, models, parasitic extraction, and technology scaling
  • Experience with working in software repository management tools like Git

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.



Other Locations

US, Arizona, Phoenix;US, California, Santa Clara;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Jobs Rated Reports for Software Engineer

Posted: 2022-05-03 Expires: 2022-06-03

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PDK Software Engineer - VLSI Physical Verification

Intel
Hillsboro, OR 97123

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Software Engineer
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