14 days old

Physical Design Engineer Lead

Intel
San Jose, CA 95113
  • Job Code
    JR0198704
Job Description

As the Programmable Solutions Group (PSG) Business Unit within Intel, we will continue to drive the future of field-programmable gate array (FPGA) technology. PSG continues to deliver industry-leading custom logic solutions to customers, and take advantage of the many opportunities that we see in the future for FPGA's, the Custom Logic Engineering group is seeking a Physical Design Lead to join our team.

The Custom Logic Engineering group is responsible for creating and delivering the best custom logic solutions that transform and accelerate a smart and connected world.

As a Physical Design Lead, you will be involved in challenging projects and drive it to completion in record time. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan. Your expertise in deep submicron technology, processor design, and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team. You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.

Physical Design Lead will be responsible for, but not limited to:

  • Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.

  • Determines architecture design, logic design, and system simulation.

  • Defines module interfaces/formats for simulation.

  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.

  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.

  • Performs all aspects of the SoC design flow from high level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.

  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.

  • Reviews vendor capability to support development.

For information on Intels immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information


Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education

Bachelor's degree in in Electrical Engineering, Computer Engineering, Computer Science or any related field.

Minimum Qualifications

7+ years of experience with Physical Design and TCL

Preferred Qualifications

10+ years of experience with Physical Design and TCL

Inside this Business Group

The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.



Other Locations

US, California, Santa Clara;US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-10 Expires: 2022-06-10

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Physical Design Engineer Lead

Intel
San Jose, CA 95113

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