15 days old

Physical Design Engineer (RF/Analog focused)

Hillsboro, OR 97123
  • Job Code
Job Description

Come join with one of the largest engineering companies in the world. Join us to develop new technology that will provide Intel a competitive advantage in the connectivity space of WiFi and Bluetooth (BT) Radios. If you find it exciting to work in a diverse team that innovates with other Intel advanced technology groups, with other industry leaders and academia, then we have your opportunity.

Intel RF development group is a world-class leader in radio solutions for connectivity (WiFi and BT). The team develops all Intel mobile wireless RFIC solutions which can be found in many high-end products. We create innovations that shape the future of technology leading the connectivity market. The development includes the most challenging RF, analog and mixed-signal circuits including LNAs and PAs, ultra-high-speed converters, low-noise/low power analog circuitry and PLLs.

In this role, your responsibilities will include but not limited to:

Physical implementation of RF and Analog design for our innovative communications platform products. Top level Chip and block level floor planning, analysis of floor plan options taking into account design constrains and area budgets.

Creating bottoms-up elements of chip design

FET cell, and block-level custom layouts
Block level floor plans, abstract view generation
RC extraction, and schematic-to-layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation.
Custom polygon editing, floor planning, full-chip assembly, packaging, and verification
Troubleshooting design issues and applies proactive intervention
Many schedule staffing, execution, and verification of complex chips development and execution of project methodologies and/or flow developments

An ideal candidate must demonstrate:

The Ability to execute to stringent schedule and die size requirements.
Strong communication skills.

The ability to be highly motivated technical expert with good communication and presentation skills.
Strong interests in problem solving and an attitude to convince people of own ideas as well as openness towards novel technical directions are mandatory.
The ability to work in multi-disciplinary / site / cultural teams.


Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Bachelor's Degree in Electrical Engineering or any STEM related field with 5+ years of relevant industry experience

Preferred Qualifications:

Experience in top level chip activities including layout design, floor planning, bump out and package basic design
Experience in working with digital and Hardware teams, understanding their methodology and constrains
Full and deep knowledge in the Cadence Virtuoso IC6 (Open Access environment)
Full and deep knowledge in Mentor Calibre verification tools.
Expert in debugging verification problems such as DRC, LVS, DFM.

Deep understanding of the layout theory such as transistor work flow, silicon cross section knowledge and fabrication process.
Experience in Analog layout designs such as DAC, ADC, differential OP amps and Base band filters circuits.
Experience in RF layout designs such as RX, TX and VCO circuits.

Inside this Business Group

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to continue to advance PC experiences to deliver the real-world performance people demand. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Other Locations

US, Arizona, Phoenix;US, California, Santa Clara

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-17 Expires: 2022-07-18

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Physical Design Engineer (RF/Analog focused)

Hillsboro, OR 97123

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