12 days old

Physical Design Engineer (RTL2GDS)

Phoenix, AZ 85003
  • Job Code
Job Description

About the team:

The position offered is for a Design Automation Engineer in the Custom Layout Team of the Process Design Kit (PDK) group, within the Design Enablement (DE) organization. Responsibilities are focused on development and support of PDK components relating to Custom Layout, primarily EDA technology files and parameterized cell development. The team plans, executes, deploys, and supports these solutions in a timely manner. Development and automated QA flows involve writing efficient code in scripting languages to automatically translate Intel process technology rules and requirements into vendor specific technology library file formats.


You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum requirements:

Bachelors in Electrical Engineering, Computer Science, or Computer Engineering or related field.

2+ years' experience in the following:

  • Backend designer with experience in RTL to GDS (Graphic Data Stream) flows using APR tools such as Synopsys ICC2 or Cadence INNOVUS tools.
  • At least one of the following Programming languages: Python, Ruby, or Tcl.
  • UNIX/Linux operating system


  • Reliability Verification (RV) flows using Apache Software (totem)
  • Modeling layout design rule concepts
  • Experience with Cadence-virtuoso tool.
  • Semiconductor devices physics

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-05-15 Expires: 2022-06-15

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Physical Design Engineer (RTL2GDS)

Phoenix, AZ 85003

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