22 days old

Physical Design Engineer

Intel
San Jose, CA 95113
  • Job Code
    JR0206805
Job Description

At Intel, we drive innovation and break through barriers every single day. We look for remarkable people who understand partnership and have desire to disrupt the status quo.  Intel's products support multiple platforms like TickTok, Instagram and Amazon. Our switches process millions of customer transactions, calls and data transmissions without interruption, in seconds.
 
Creating technology that works that fast, takes talent and passion. We invite you to come join a creative team of engineers dedicated to designing technologies that network the leading cloud-service datacenters. We offer, paid sabbatical, Immediate vesting at 100% of company matched 401k contributions, Annual and Quarterly Bonuses, Stock Programs,  On-campus health clinics, fitness classes, spas, healthy meals, caf options and so much more!
 

In this position you will be part of a world class Ethernet IP & SOC design team responsible for the design and development of the Ethernet Controllers and Networking Processing of the Network Division Silicon Engineering team. You will perform all aspects of the physical design flow from engaging with design team through synthesis, place and route, timing analysis and power reduction.  This is a great opportunity to join a talented team and will include lots of product innovation on cutting edge technologies.

Responsibilities will include but not limited to:

  • Drive technical activities during all phases of physical design execution Work extensively with SoC and RTL teams to help optimize/converge the designs to achieve the best Power, Performance, and Area (PPA).

  • Logic synthesis of design blocks, Formal Equivalence Verification (FEV),Clocking network planning and analysis, Auto Place-and-Route (APR) using Synopsys ICC tools / Cadence Innovus tools,

  • Timing signoff and timing ECO using Synopsys Prime Time, Physical verification - Layout vs. Schematic (LVS), Design Rule Checks (DRC), Electrical Rule Checks (ERC).

  • Eager to improve, influence tools, flows and overall RTL to GDS physical design methodology with data-drive approach.


Qualifications

Minimum Qualifications

Candidate must have a Bachelor's degree in Computer science/Electrical or -OR- a Master's degree in Computer science/Electrical or Computer Engineering with 4 plus years of experience.

Preferred Qualifications

  • Experience working on advanced process nodes such 7nm and below.

  • Experience in semiconductor device physics Understanding of Physical Design and verification Tools, Flows and Methods Expert user of physical design tools such as DC (Design Compiler), ICC2/Innovus, Primetime, etc. Good experience with Redhawk for signal EM and IRdrop analysis.

  • Analytical with problem-solving skills.

  • Excellent verbal and written communication skills.

Inside this Business Group

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.



Other Locations

US, Arizona, Phoenix


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.

Posted: 2022-06-07 Expires: 2022-07-08

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Physical Design Engineer

Intel
San Jose, CA 95113

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