22 days old

Physical Design Engineer

Santa Clara, CA 95050
  • Job Code
Job Description

 Foundry Technology Engineering (FTE) group under Global External Manufacturing and Sourcing (GEMS) is looking for a highly motivated and experienced individual to be part of an exciting engineering team dedicated to enabling and supporting Foundation IPs for Intel design projects (such as client, server, core, atom, graphics, mixed signal IPs and other SoC projects) to be successful on external foundry process technologies.

As an experienced physical designer, you will collaborate and partner with stakeholders in FTE, other Intel business units and external foundries to assess impact of new design rules or processes as well as drive successful physical design migration for intel custom cells and memory macros to enable fast design execution and convergence on new processes.

Your responsibilities will also include, but not limited to:

  • Contribute to pathfinding activities in collaborations with other FTE teams in the areas of cell architecture and design rule options/tradeoffs for new processes using a combination of cell level and block level PPA evaluations.

  • Collaborate with circuit and layout designers to perform Design-Technology Co-Optimization (DTCO) to achieve better PPA for standard and custom cells.

  • Evaluate physical design migration utilities/tools and provide guidance to layout designers for more efficient physical design migration.

  • Partner with external foundries and design teams to lead testing and evaluation of physical design, verification and QA tools.

A successful candidate will demonstrate:

  • Excellent communication and interpersonal skills for effective cross-functional collaborations

  • Customer oriented and able to work in a dynamic environment


You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

  • Master's Degree in Electrical and Computer Engineering or related fields

  • 3+ years of experience in physical design, design rules and PPA optimizations

Preferred Qualifications:

  • Extensive experience in cell architecture and design rule options/tradeoffs on advanced technology nodes for better DTCO

  • Experience in working with circuit and layout designers to improve timing/reliability/quality as well as evaluate physical design/verification tools.

Inside this Business Group

Intel's Sales and Marketing (SMG) organization works with global customers and partners to solve critical business problems with Intel based technology solutions. SMG works across business units to amplify the customer voice and deliver solutions that accelerate their business. We work across numerous industries, including retail, enterprise and government, cloud services and healthcare as examples. The operations team focuses on forecasting, driving alignment with factory production and delivering efficiency tools and our marketing capability drives demand and localized marketing in locations around the globe. Our sales force navigates a complex partner and customer ecosystem while shaping product roadmaps, driving value for our customers, and collaborating to harness emerging technology trends to deliver comprehensive solutions.

Other Locations

US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Posted: 2022-04-26 Expires: 2022-05-27

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Physical Design Engineer

Santa Clara, CA 95050

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