Become a member of one of the largest engineering companies in the world!

Come join an industry leading signaling development team at Intel Corporation. The team is part of the Intel's Data Center and Artificial Intelligence (AI) Group.

This position will enable you to experience technology development from inception to production. You will work side by side with industry experts and leaders in high-speed signal integrity. You will also work to develop next generation technology. Work that we do today will be the backbone to the Data Centers and Artificial Intelligence systems of tomorrow.

Your responsibilities would include but are not limited to:

• Identifying creative design approaches to complex signal propagation constraints.

• Conducting experimental simulation tests and evaluating results.

• Providing design guidelines for platforms and packages based on simulation and 3D modeling activities

• Review platform and package designs to ensure that signal paths are laid out to meet design specifications for high-speed interfaces such as PCIe, UPI, and Ethernet.

Qualifications

You must possess minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.

Minimum requirements:

The candidate must have a Master's degree or higher in Electrical Engineering or related field.

Minimum of 6+ months of experience in one or more of the following:

• Transmission line theory and electromagnetic field concepts.

• Lab equipment such as Oscilloscope, Time Domain Reflectometry Module (TDR), or Vector Network Analyzer (VNA).

• Scripting languages such as Matlab, Perl, or Python.

Preferred qualifications:

• Signal integrity simulation tools, which may include Sigma or HSpice.

• High-speed digital interconnect design and analysis concepts, such as PCIe, DDR, etc.

• PCB layout concepts, which may include experience with tools such as Candence, Allegro or Mentor.

• Silicon device modeling methods, which may include IBIS, AMI, or Verilog-A.

• 2D/3D field solver tools, which may include XFX, iMap, HFSS, or Power Signal Integrity (SI).

The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologiesspanning software, processors, storage, I/O, and networking solutionsthat fuel cloud, communications, enterprise, and government data centers around the world.

Other Locations

Virtual US and Canada

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Annual Salary Range for jobs which could be performed in US, Colorado:
$97,500.00-$146,340.00

Intel is committed to a culture of accessibility.  Intel provides accommodations to applicants and employees with disabilities.  Find information and request accommodation here