The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. The Advanced Architecture Development Group (AADG) is a CPU Core development team.

We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.

If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we invite you join us, to do something wonderful!

Your responsibilities will include but not be limited to:

• Validation of a Power and performance of CPU IP across multiple active and idle workloads including system level interactions.

• Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code, Firmware, and other tests as a guide.

• Learning the architecture, microarchitecture, and Power Management flows by debugging power and performance bugs , such as latencies, performance bottlenecks due to Power management issue etc..

• Analyze active and idle power management flows to identify and define latency optimizations to improve performance and battery life

• Identify architectural, RTL and gate level improvements and drive the changes into the design

• Engaging with IP providers and customers to define, develop and deliver necessary infrastructure and address issues found during execution.

• Understand, debug and modify Verilog RTL using industry standard design tools

• Proactively drive continuous improvement through enhancement of existing tools and development of new tools and methodologies

• Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design.

• Create collateral using a verification environment in System Verilog/OVM/UVM

• Collaborate with Architecture, Design, Pre- and Post silicon validation teams to achieve the power efficiency goals

• Debugging power features in Post-Si environment

• Identify power optimizations in post-silicon across OS, BIOS, drivers and SoC

• Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models.

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Candidate must have either a BS + 8 years' experience or MS + 6 years' experience in Computer Science, Computer Engineering or Electrical Engineering.

3+ years of experience with:

• UNIX or Linux

• Active and idle Power Management flows

• Power measurement tools like PTPX

• Programming languages such as Python or C/C++

• 4+ years of experience in Pre- or post- silicon verification

• 5+ years of experience with reading and interpreting technical specs and Register Transfer Level (RTL) code

• 5+ years of experience in IP or SoC development, verification, or integration using Verilog/System Verilog/OVM/UVM

Preferred Qualifications:

• 5+ years of experience writing validation plans and software to implement those validation plans

• 3+ years of experience Power management interactions between OS, drivers, BIOS, and SoC

• Computer architecture, IA-32 assembly and/or Verilog programming

The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon.  If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, please join us.  We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.  Join us to do something wonderful!

Other Locations

US, Texas, Austin

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.