9 days old

Power Design Automation Engineer

Intel
Hillsboro, OR 97123
  • Job Code
    JR0211945
Job Description

The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, please join us. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. Join us to do something wonderful.

As part of our team, you will drive tool, flow, and methodology (TFM) enabling efforts for RTL2GDS (BE) construction and verification flows focusing primarily on the space of power tools and methodologies. Responsibilities will include enabling the design environment, infrastructure, data management solutions, EDA tools, and flows along with creating new methods for design automation towards best-in-class power, performance, and area (PPA) for a fully synthesizable core architecture. This requires expertise in industry standard EDA solutions including process technologies, UPF, static LP flows, synthesis and Place and Route flows, Timing, Central Runs, LV and RV enabling, and all other tape-in activities. Expertise with scripting (Perl/Python/TCL) is a must.


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:


The candidate must have a Bachelor's degree in Electrical/Computer Engineering or Computer Science and 8+ years of experience -OR- a Master's degree in Electrical/Computer Engineering or Computer Science and 6+ years of experience in:

  • IC Design, ASIC or Computer Aided Design (CAD).

  • Latest EDA industry tools from Cadence, Synopsys, or Mentor to provide power estimation along with RTL2GDS tools and flows for construction and verification towards silicon tape-in, for example synthesis, APR, design floorplan, STA/timing, formal equivalence, LV and RV flows, and all other tape-in activities.

  • Electronic Design Automation software, flows, automation, and architecture

  • Understanding of Integrated Circuit IC, ASIC construction and verification tools and related design methodologies

  • Programming in Linux shells, Perl, Python and Tcl

  • Data management platforms required: Perforce, Git, or equivalent


Preferred Qualifications:

  • Experience with RTL model simulation, validation, and continuous integration flows.

  • Expertise and experience with CI/CD (Continuous Integration/Continuous Delivery) methods.

  • Ability to collaborate with methodology leads to understand and deliver automated solutions that accelerate the design feedback loop.

  • Knowledge of ML (Machine Learning) techniques and compute efficiency methodologies.

  • Demonstrated experience interfacing with engineers, senior leaders, and stakeholders.

  • Demonstrated experience mentoring, coaching and leading teams of junior engineers working across multiple Intel sites.

  • Excellent communication skills.

Inside this Business Group

The Advanced Architecture Development Group (AADG) is a CPU Core development team in Portland, Oregon.  If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, please join us.  We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible.  Join us to do something wonderful!



Other Locations

US, Texas, Austin


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-05-14 Expires: 2022-06-14

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Power Design Automation Engineer

Intel
Hillsboro, OR 97123

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