As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can choose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with Arm and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications.


About the Role:

Intel Foundry Services is looking for design engineers to benchmark power, performance, and area (PPA) for Foundry process technology nodes on Industry standard ARM IPs along with Intel architectures - to allow foundry customers to evaluate technology PPA offerings in a systematic way.

Responsibilities:

Compare and objectively benchmark PPA of IFS technology nodes against competition offerings to guide IFS technology teams to target market segments that aligns with technology strengths.
Supporting RTL synthesis and place and route experiments using internal and external vendor tools to evaluate Intel's product Power, Performance, and Area, for existing and future process nodes on internal Intel Architecture and external ARM IP's and put it in perspective of what IFS customer needs.
Evaluate the impact of floorplan changes, corresponding scaling and its impact to power, performance, debug scaling and timing issues for the present tech node and predict how it would impact scaling, timing, and power for the next tech node, improve cell utilization and transistor density metrics and keep pushing the power, performance envelope through critical path analysis, metal layer usage by the tool, etc.
Drive software solutions in providing tools, API's, and methodologies to help hardware design teams co-optimize their designs for leading edge process nodes. Build services and APIs to allow efficient and safe access to the ML algorithms which will enable the creation of visualizations to help customers analyze their results to achieve their desired outcomes

Qualifications

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Education Requirement:

• Bachelor's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 5 years of industry work experience, or

• Master's degree in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 3 years of industry work experience, or

• PhD in Electrical or Computer Engineering, Computer Science, Math, Physics, or related field plus 2 years of related work experience.

Minimum Qualification:

• Has good software and scripting skills (Perl, Tcl, Python)

• Has a good understanding of industry standards in leading edge technology nodes

• Proficiency in physical design from synthesis through signoff (Synopsys or Cadence)

Additional Preferred Qualifications:

• Experience performing feasibility or technology pathfinding

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moores Law to bring smart, connected devices to every person on Earth.

Other Locations

US, Arizona, Phoenix;US, California, Folsom;US, California, Santa Clara;US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.