23 days old

Pre-si Power Management FW Validation Engineer

Intel
Folsom, CA 95630
  • Job Code
    JR0219920
Job Description
Would you like to work on a high performance CPU design? Would you like to implement designs in a state of the art process technology?

We are a trusted, innovative IP design team delivering High Performance DDR PHY design for Intel's Data Center products. We are designing innovative IP for the next generation of CPU's that will fuel Intel's growth in Datacenter and the virtuous cycle. We are looking for an outstanding design engineer to join our engineering team.

You will collaborate with architects, logic designers, and analog engineers in evaluating implementation details of complex design features. You will perform all aspects of the SoC design flow from high-level design through synthesis, place and route, timing analysis and power reduction. You will be responsible for creating a design database that has completed sign-off flows and is ready for manufacturing.

Responsibilities that you will help us:
  •  Oversees definition, design, verification, and documentation for SoC (System on a Chip) development.
  • Determines architecture design, logic design, and system simulation.
  • Defines module interfaces/formats for simulation.
  • Performs Logic design for integration of cell libraries, functional units and subsystems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs.
  • Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.
  • Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing.
  • Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results.
  • May also review vendor capability to support development. Good communication and collaboration skills


Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research, and relevant previous job and internship experience.

Minimum skills and experience:

Must have a Bachelor's in Electrical/Computer Engineering or STEM equivalent with a minimum of 3+ years of relevant industrial experience. Or a Master's in the same fields  with a minimum of 3+ months of education or industrial experience.

Your experience must be in the following:

  • SoC architecture
  • RTL design, or Firmware validation/verification and/or debug using Verilog/System Verilog
  • Knowledge in industry Front-End/RTL tools and design methodologies.

Inside this Business Group

If you are passionate about computer graphics and working with leading graphics engineers on Intel's latest GPU/CPU architecture, then our GTCHE team has opportunities for you. As part of GTCHE (GTCHE: GFX and Throughput Computing Hardware Engineering) team we are passionate about delivering best-in-class visual experiences that enable users to immerse themselves in a new visual future. You will develop graphics, media, display and imaging solutions for a range of platforms from traditional PCs to high end datacenter servers.


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-04-30 Expires: 2022-06-01

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Pre-si Power Management FW Validation Engineer

Intel
Folsom, CA 95630

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