23 days old

Pre-Si Verification Engineer

Intel
Phoenix, AZ 85003
  • Job Code
    JR0221926
Job Description

The IP Testchip and Validation Engineering team is hiring experienced Pre-Si Verification Engineers. 

In this role, the candidate will:

  • Work with a high performing team to deliver fully functional test chips on Intel's latest process technology to reduce product risk.

  • Interface with architects and senior design team members to develop test plans covering test environments, checker and coverage strategies and test generators.

  • Utilize various debug and validation tools to implement validation plans and develop test benches, test sequences, functional coverage to perform verification of designs under test.

  • Interface with Post-Si team for seamless porting of test content from Pre-Si environment.

In addition to the qualifications listed above the ideal candidate will also have:

  • Excellent analytical and problem-solving skills.

  • Solid verbal/written communication skills.

  • Effective team player with continuous learning mindset.

  • Willingness to balance multiple tasks.

  • Willingness to work in a fast-paced environment and have as much fun and growth as possible in the process.


Qualifications

Minimum Qualifications:

Bachelor's degree in Electrical or Computing Engineering with 5+ years of experience.

OR

M.S in Electrical or Computer Engineering with 3+ years of experience in:

  • Experience in developing SystemVerilog test bench using OVM/UVM constrained random verification methodology.

Preferred Qualifications:

  • Working knowledge of some of the protocols such as AMBA, PCI, PCIe, Ethernet, USB and JTAG.

  • Experience in Assertion, Functional Coverage and Solid debugging skills.

  • Experience in PERL/Python, Shell Scripting and Microsoft Office products for documentation.

  • Knowledge about version control system and bug tracking tools.

  • Experience in the full product cycle of validation from planning to post-silicon support.

  • Industry standard simulation EDA tools from Cadence, Mentor Graphics, or Synopsys

  • Programming experience with Hardware description languages like Verilog, VHDL or SystemVerilog.

Inside this Business Group

IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.



Other Locations

US, California, Santa Clara


Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.



Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.



Work Model for this Role

This role is available as fully home-based and generally would require you to attend Intel sites only occasionally based on business need.

Posted: 2022-05-04 Expires: 2022-06-04

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Pre-Si Verification Engineer

Intel
Phoenix, AZ 85003

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