3 days old

Pre-Silicon Design Verification Engineer

Santa Clara, CA 95050
  • Job Code
Job Description
  • You will be responsible for the full life-cycle of verification, from planning to test execution and including collecting and closing coverage.

  • You will closely interface with architecture and design teams to understand design/product requirements and develop comprehensive test plans and you will conduct/participate in test plan and test reviews, develop verification components and tests, and triage failures.

  • You will mentor and provide guidance to junior verification engineers in the execution of their tasks.

Responsibilities include:

  • Developing pre-Silicon functional validation tests to verify system will meet design requirements.

  • Creating test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.

  • Analyzing and using results to modify testing.

  • The leader in this position develops scoreboard, monitors, checkers for IP.

  • Debug failing signatures.

  • Analyzes coverage holes to reach project functional coverage goals.

  • Reviewing test plans for all the blocks and tracking progress to milestones.


Minimum Qualifications:

  • Bachelor Degree in Computer Engineering or Electrical Engineering and 4+ years of experience in pre-Silicon verification.


  • Relevant ASIC design/validation experience in front end processes including RTL development, functional and performance verification.

  • Expertise in verification of design blocks (IP) for system-on-chip (SoC) components.

  • Expertise in system Verilog , UVM, and/or OVM based verification methodologies.

  • Experience in OOP concepts, coverage based random validation.

  • Knowledge of scripting.

  • Developing scalable and portable test bench.

  • Waveform debugging with latest EDA tools, root-cause bugs independently.

Preferred Qualifications:

  • Master in Computer Engineering or Electrical Engineering is a plus and counted as experience if related to the area..

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.  DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Oregon, Hillsboro

Intel strongly encourages employees to be vaccinated against COVID-19. Intel aligns to federal, state, and local laws and as a contractor to the U.S. Government is subject to government mandates that may be issued. Intel policies for COVID-19 including guidance about testing and vaccination are subject to change over time.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Posted: 2022-06-29 Expires: 2022-07-31

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Pre-Silicon Design Verification Engineer

Santa Clara, CA 95050

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